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研究生: 王瑋謙
Wei-Chian Wang
論文名稱: 低輸入電流漣波之非對稱全橋轉換器
Asymmetrical Full-Bridge Converter with Input Current Ripple Reduction
指導教授: 呂錦山
Ching-Shan Leu
口試委員: 林瑞禮
Ray-Lee Lin
楊宗銘
Chung-Ming Young
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2013
畢業學年度: 101
語文別: 英文
論文頁數: 91
中文關鍵詞: 低輸入電流漣波全橋轉換器直流偏流非對稱控制台灣科技轉換器零電壓切換
外文關鍵詞: input current ripple reduction, full-bridge converter, DC-bias, asymmetrical control, Taiwan Tech converter, zero-voltage-switching (ZVS)
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相移全橋轉換器被廣泛使用於中高功率的應用,因為它的開關有較低的電壓和電流應力以及高的轉換效率。然而,相移全橋轉換器有一較大的輸入脈衝電流漣波,這使得相移全橋轉換器必須使用較大的電磁干擾濾波器來使電路能達到相關的規範。而這也限制了相移全橋轉換器的轉換功率密度。因此有人提出了降低輸入電流漣波的相移全橋轉換器來解決此問題,但使用相移控制會使電路有一環流的時區間,這個時區間會造成環流損而降低轉換效率。因此,解決此環流問題便成為了本篇論文的主要動機。
為了解決環流問題,本論文提出了一個低輸入電流漣波之非對稱全橋轉換器,此非對稱控制並無相移控制的環流時區間,因此能消除該時區間造成的環流損,且非對稱控制還能保有零電壓切換的機制。然而,此轉換器繼承了非對稱控制造成變壓器有直流的問題,因此本篇論文也提出了無直流之低輸入電流漣波非對稱全橋轉換器來消除此直流問題。
此外,也針對了本論文提出的兩個電路做電路分析,並且以300~400V輸入48V/750W輸出之硬體規格來驗證所提出的電路可行性。


The phase-shift full-bridge converter (PSFB) is widely used in medium-to-high power applications due to its several advantages, such as low voltage and current stress on switches and high conversion efficiency. However, the PSFB still has a large pulsating input current ripple which is a common characteristic of the buck-derived converters. Consequently, a large input filter has to be used to meet the EMI regulation. It limits the power density performance. To reduce the input current ripple, a phase-shift full-bridge converter with input current ripple reduction (PSFB-RR) has been proposed. However, the circulating time interval causes a large circulating loss. To explore a ZVS full-bridge converter with input current ripple reduction without circulating loss becomes the motivation of this thesis and an asymmetrical full-bridge with input current ripple reduction (AFB-RR) converter is thus proposed. However, the AFB-RR has the conventional asymmetrical control has a DC-bias current on power transformer.
To eliminate the DC-bias current, another asymmetrical control is employed and the non DC-bias asymmetrical full-bridge converter (NAFB-RR) is also proposed in this thesis.
Besides, the operation principle and circuit analysis, several prototypes with 300-400 V input voltage and 48 V/750 W output are implemented and tested to demonstrate their feasibility.

Abstract I Acknowledgements II Table of Contents III List of Figures V List of Tables IX Chapter 1. Introduction 1 1.1. Background and Motivation 1 1.2. Objectives of the Thesis 4 1.3. Organization of the Thesis 5 Chapter 2. Asymmetrical Full-Bridge with Input Current Ripple Reduction 6 2.1. Introduction 6 2.2. Operational Principle 9 2.3. Circuit Analysis 15 2.3.1. Voltage gain 15 2.3.2. Duty cycle loss 16 2.3.3. Switches voltage stress 17 2.3.4. Transformer DC-bias current 17 2.3.5. Input current ripple 19 2.3.6. Zero voltage switching condition 21 2.4. Circuit Design 23 2.4.1. Duty cycle range and turns-ratio n=Ns/Np 23 2.4.2. Transformer design 23 2.4.3. Leakage inductors Leq 27 2.4.4. Clamping capacitor Cc1, Cc2 27 2.4.5. Output inductor Lo 29 2.4.6. Output capacitor Co 32 2.4.7. Semiconductor components 33 2.5. Experimental Results 34 2.6. Summary 44 Chapter 3. Non DC-bias Asymmetrical Full-Bridge with Input Current Ripple Reduction 46 3.1. Introduction 46 3.2. Operational Principle 47 3.3. Circuit Analysis 56 3.3.1. Voltage gain 56 3.3.2. Duty cycle loss 57 3.3.3. Switches voltage stress 57 3.3.4. Input current ripple 58 3.3.5. Zero voltage switching condition 59 3.4. Circuit Design 61 3.5. Experimental Results 62 3.6. Summary 72 Chapter 4. Conclusions and Future Research 74 4.1. Conclusions 74 4.2. Future Researches 75 Reference 76

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