在RF射頻收發機中，Phase-locked loop的特性非常重要，PLL內部包含了相位偵測器(Phase Frequency Detector)、充電幫浦(Charge Pump)、迴路濾波器(Loop Filter)、壓控振盪器(Voltage Control Oscillator)、除頻器(Frequency Divider)，注入鎖定除頻器特性包含低功耗，低相位雜訊，與較寬的除頻範圍，而本論文以注入鎖定除頻器與壓控振盪器為主。

首先，第一部分我們研究一個使用可調式電容,並在其兩端注入MOS間掛載一顆電感的除五注入鎖定除頻器其鎖頻範圍特性，此除頻器實現於台積電0.18 μm CMOS製程。此電路使用四個電感，而晶片的面積為1.02 × 0.93mm2。研究發現從注入功率0 dBm到注入功率-20dBm可以看到三個收斂的點分別在13GHz、14GHz和16.8GHz附近，也就說明此電路透過可調式電容在特定某種偏壓下分別有三個頻帶，因此透過三種頻帶的交疊就可獲得較寬的除頻範圍。當工作偏壓在0.9伏特，注入訊號強度為0 dBm時功率消耗為4.95 mW，除頻範圍為12.7GHz到17.2G共4.5GHz，總除頻百分比例為30.1 %，另外在低頻段的部分找到了除三的現象，其工作偏壓為0.58伏特、注入訊號強度為0 dBm時功率消耗為3.25 mW，除頻範圍為6.3GHz到10G共3.7GHz，總除頻百分比例為45.4%。
再來我們提出一個使用電流再利用架構的除八注入鎖定除頻器，並由台積電0.18 μm CMOS製程實現。此除八除頻器架構概念是將訊號先注入到一組除四N型金氧半場效電晶體交互式耦合除頻器工作後，再將除四完後的訊號拉至另一組除二P型金氧半場效電晶體交互式除頻器來達到除八之效果，在此的除四電路特別使用了一對自製的圓形互感以得到較佳的耦合係數和Q值及適當的感值。當工作偏壓在1.6伏特、注入訊號強度為0 dBm時功率消耗為13.98 mW，除頻範圍為8.3 GHz到12.3 GHz共4GHz，總除頻百分比例為38.83 %，晶片面積為1.2 × 1.2 mm2。
最後，本篇提出一個穩懋氮化鎵 0.25微米製程的壓控振盪器並具有三種震盪頻率，分別為1.7GHz、1.9GHz和2.1GHz左右，此電路採用多重路徑圓形互感分別接出兩個共振腔，利用調整閘極與汲極的偏壓來控制共振腔的開啟與關閉，並進而改變振盪頻率與相位雜訊，當工作偏壓在0.6伏特時功耗為1.8mW，其最佳FOM值為-189.43在此之下的頻率為2.1GHz、相位雜訊為-123.32dBc/Hz在1 MHz時，晶片面積為2x1 mm2。

In the RF transceiver, PLL is very important, PLL components include Phase Frequency Detector (PFD), Charge Pump (CP), Loop Filter (LF), Voltage Controlled Oscillator (VCO), and Frequency Divider (FD). The most important characteristics of divider performance are low-power, low phase noise, wide locking range. This thesis presents the design of Injection-Locked Frequency Dividers and VCO.
Firstly, we study the locking range of an LC tank divide by five injection locked frequency divider that uses a pair of varactors and tests the characteristic about connecting an small inductor between the two injection MOS, this circuit designed in the tsmc 0.18 μm CMOS process. We use four inductors in this circuit and the chip area is 1.02 × 0.93 mm2. We observed the sensitivity of locking range to get an information that this circuit has three locking range frequency at the incident power of 0 dBm to -20 dBm, the resonant frequencies are 2.6GHz, 2.7GHz and 3.4GHz respectively. At the supply voltage of 0.9 V, the power consumption is 4.95mW, at the incident power of 0 dBm the locking range is 4.5 GHz(30.1%), from the incident frequency 12.7 GHz to 17.2 GHz. The free-running oscillation frequency is 2.877 GHz. We also find a characteristic about divide by three at lower frequency band. At the supply of 0.58 V, the power consumption is 3.25mW, at the incident power of 0 dBm the locking range is 3.7 GHz(45.4%), from the incident frequency 6.3 GHz to 10 GHz. The free-running oscillation frequency is 2.956 GHz.
Secondly, a current-reused LC tank divide by eight injection locked frequency divider designed in the tsmc 0.18 μm CMOS process. The proposed current-reused ILFD is based on a divide by two p-core LC ILFD stacking on a divide by four n-core capacitive cross-coupled LC ILFD. In the divide by four we use a circle mutual inductance to get better coupling coefficient and Q factor. At the supply of 1.6 V and at the incident power of 0 dBm, the locking range is 4 GHz(38.83%), from the incident frequency 8.3 GHz to 12.3 GHz, and the chip area is 1.2 × 1.2 mm2.
Finally, we presented a GaN HEMT oscillator with switching active cores in 0.25 μm GAN HEMT process. The proposed voltage controlled oscillator is based on a multipath transformer connect two resonant respectively, the free-running oscillation frequency is 1.7GHz, 1.9GHz and 2.1GHz. We use the gate and drain biases to control the resonant on and off, through these we can tune the oscillation frequency. At the supply of 0.6 V, the phase noise is -123.3 dBc/Hz at the offset frequency of 1 MHz from the carrier at 2.1 GHz at the power consumption 1.8mW.

[1] B. Razavi, RF Microelectronics, Prentice Hall PTR, 1998.
[2] P.-C. Huang, M.-D. Tsai, H. Wang, C.-H. Chen, and C.-S. Chang, “A 114GHz VCO in 0.13μm CMOS technology,” IEEE International Solid-State Circuits Conference, vol. 1, pp.404-606, 6-10 Feb. 2005.
[3] B. Razavi, Design of Analog CMOS Integrated Circuits, Mc Graw Hill, 2001.
[4] T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press 1998.
[5] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Transactions on Parts, Hybrids, and Packaging, vol. 10, pp. 101-109, Jun 1974.
[6] J. Craninckx and M. S. J. Steyaert, “A 1.8 GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 736–744, May. 1997.
[7] P. Yue, C. Ryu, Jack Lau, T. Lee, and S. Wong, “A physical model for planar spiral inductors on silicon,” 1996 International Electron Devices Meeting Technical Digest, pp. 155–158, Dec. 1996.
[8] S. H. Lee, S. L. Jang, Implementation of New High Frequency CMOS VCOs and Injection-Locked Frequency Dividers, April 2007.
[9] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE Journal of Solid-State Circuits, vol. 35, pp. 1368-1382, Sept. 2000..
[10] E. Frlan, S. Meszaros, M. Cuhaci, and J.Wight, “Computer-aided design of square spiral transformers and inductors,” in Proc. IEEE MTT-S, pp. 661-664, June 1989.
[11] M. W. Geen, G. J. Green, R.G. Arnold, J. A. Jenkins, and R. H. Jansen, “Miniature multilayer spiral inductors for GaAs MMICs,” Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, pp. 303-306, 22-25 Oct. 1989.
[12] H. Wu and A. Hajimiri, “A 19GHz 0.5mW 0.35μm CMOS frequency divider with shunt-peaking locking-range enhancement and slides,” Solid-State Circuits Conf., 2001.
[13] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July. 1996.
[14] Q. Huang and R. Rogenmoser, “Speed optimization of edge-triggered CMOS circuits for gigahertz single-phase clocks,” IEEE J. Solid-State Circuits, vol. 31, pp. 456-463, Mar. 1996.
[15] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18-μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, pp. 594-601, Apr. 2004.
[16] H. R. Rategh, and T.H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June. 1999.
[17] H. D. Wohlmuth and D. Kehrer, “A high sensitivity static 2:1 frequency divider up to 27 GHz in 120 nm CMOS,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 823-826, Sept. 2002.
[18] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1 GHz and 2.8 GHz CMOS injection-locked ring oscillator prescalers,” IEEE Symposium on VLSI Circuits, pp. 47-50, June. 2001.
[19] P. Kinget, R. Melville, D. Long, and V. Gopinathan, “An injection locking scheme for precision quadrature generation,” IEEE J. Solid-State Circuits, vol. 37, pp. 845-851, July. 2002.
[20] W. Z. Chen, and C. L. Kuo, “18 GHz and 7 GHz superharmonic injection-locked dividers in 0.25μm CMOS technology,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 89-92, Sept. 2002.
[21] H. Wu, Signal generation and processing in high-frequency/high-speed siliconbased integrated circuits, PhD thesis, California Institute of Technology, 2003.
[22] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp. 1380-1385, Oct. 1973.
[23] L. Wang, Y. Z. Xiong, S. M. Hu, and T. G. Lim, “A 0.13-μm HBT divide-by-6 injection-locked frequency divider,” 2011 IEEE ASSC Conf., Nov. 2011, pp.97-100.
[24] C.-C. Chan, T.-H. Lin, and H.-Y. Chang, “A 31.2% locking range K-band divide-by-6 injection-locked frequency divider using 90 nm CMOS technology,” in IEEE MTT-S Int. Microwave Symp. Digest, Phoenix, USA, May 2015.
[25] T. Siriburanon, W. Deng, A. Musa, K. Okada, and A. Matsuzawa, “A 13.2% locking-range divide-by-6, 3.1mW, ILFD using even-harmonic-enhanced direct injection technique for millimeter-wave PLLs, ” IEEE European Solid-State Circuits Conf., 2013, pp. 403-406.
[26] P.-H. Feng, and S.-H. Liu, “A current-reused injection-locked frequency multiplication/division circuit in 40-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 4, pp. 1523- 1532, Apr. 2013.
[27] S.-L. Jang, T.-C.Kung and C.-W. Hsue, “Wide-locking range divide-by-4 Injection-locked frequency divider using linear mixer approach,” IEEE Microw. Wireless Compon. Lett. , vol. 27, no. 4, pp.398-400, 2017.
[28] Wu and L. Zhang, “A 16-to-18 GHz 0.18-m epi-CMOS divide-by-3 injection-locked frequency divider,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2006, pp. 2482–2491
[29] K. Yamamoto and M. Fujishima, “70 GHz CMOS harmonic injectionlocked divider,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2006, pp. 2472–2481.
[30] J. Jeong and Y. Kwon, “V-band high-order harmonic injection-locked frequency-divider MMICs with wide bandwidth and low-power dissipation,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 6, pp. 1891-1898, Jun. 2005.
[31] S.-L. Jang, and C.-W. Chang, ” A 90nm CMOS LC-tank divide-by-3 injection-locked frequency divider with record locking range,”IEEE Microw. Wireless Compon. Lett., vol. 20, pp.229-231, April, 2010.
[32] S.-L. Jang, T.-C. Kung and C.-W. Hsue," Wide-locking range divide-by-4 injection-locked frequency divider using linear mixer approach," IEEE Microw. Wireless Compon. Lett., vol. 27, no. 4, pp.398-400, 2017.
[33] S.-L. Jang, K.–W. Lu and Y.-R. Huang, ” Wide-band dual-resonance capacitive cross-coupled divide-by-5 injection-locked frequency divider,” Int J. Circuit Theory and Appl., vol 46., pp.683-690, 2018.
[34] P.-K. Tsai, T.-H. Huang and Y.-H. Pang, “CMOS 40 GHz divide-by-5 injection-locked frequency divider, ” IET Electronics Letters, vol.46, no.14, pp.1003-1004, Jul. 2010.
[35] M.-W. Li, P.-C. Wang, T.-H. Huang, and H.-R. Chuang, “Low-voltage, wide locking range, millimeter-wave divide-by-5 injection-locked frequency dividers,”IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 679–685, Mar. 2012.
[36] M. Jalalifar and G.-S. Byun, ” A K-band divide-by-five injection-locked frequency divider using a near-threshold VCO,” IEEE Microw. Wireless Compon. Lett., vol. 24, no. 12, pp. 881-883, 2014.
[37] S.-L. Jang, S.-J. Jian and C.-W. Hsue," Wide-band divide-by-4 injection-locked frequency divider using harmonic mixer," IEEE Microw. Wireless Compon. Lett., 924-926, Oct. 2017.
[38] S.-L. Jang,, S.-J. Jian, and C.-W. Hsue, ” Frequency tuning hysteresis of a dual-resonance ÷3 cross-coupled injection-locked frequency divider,”IET Microw. Antennas Propag., 2018.
[39] J. Jeong and Y. Kwon, “V-band high-order harmonic injection-locked frequency-divider MMICs with wide bandwidth and low-power dissipation,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 6, pp. 1891-1898, Jun. 2005.
[40] M.-W. Li, P.-C. Wang, T.-H. Huang, and H.-R. Chuang, “Low-voltage, wide locking range, millimeter-wave divide-by-5 injection-locked frequency dividers,”IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 679–685, Mar. 2012.
[41] P.-K. Tsai, T.-H. Huang and Y.-H. Pang, “CMOS 40 GHz divide-by-5 injection-locked frequency divider, ” IET Electronics Letters, vol.46, no.14, pp.1003-1004, Jul. 2010.
[42] S.-L. Jang, K.–W. Lu and Y.-R. Huang, ” Wide-band dual-resonance capacitive cross-coupled divide-by-5 injection-locked frequency divider,” Int J. Circuit Theory and Appl., vol 46., pp.683-690, 2018.
[43] Y.-H. Chuang, S.-H. Lee, R.-H. Yen, S.-L. Jang, J.-F. Lee, and M.-H. Juang, “A wide locking range and low voltage CMOS direct injectionlocked frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 299–301, May 2006.
[44] R. Shu, V. Subramanian, and G. Boeck, “A 8:1 static frequency divider operating up to 34 GHz in 0.13- m CMOS technology,” in IEEE MTT-S Int. Microw. Symp. Dig., Sep. 2011, pp. 17–20, Workshop Ser. Millim. Wave Integration Technol
[45] S. Cheng, H. Tong, J. S. Martinez and A. I. Karsilayan “A fully differential low-power divide-by-8 Injection-locked frequency divider up to 18 GHz,” IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 583-591, Mar. 2007
[46] A. Musa, K. Okada, and A. Matsuzawa, “A 20 GHz ILFD with locking range of 31% for divide-by-4 and 15% for divide-by-8 using progressive mixing,” IEEE Asian Solid-State Circuits Conf. Tech. Dig., Nov. 2011, pp. 85–88..
[47] S.-L. Jang, T.-C. Kung and C.-W. Hsue, “Wide-locking range divide-by-4 injection-locked frequency divider using linear mixer approach,” IEEE Microw. Wireless Compon. Lett., vol. 27, no. 4, pp. 398–400, April 2017..
[48] Y.-S. Lin, W.-H. Huang, C.-L. Lu, and Y.-H. Wang, “Wide-locking-range multi-phase-outputs regenerative frequency dividers using even-harmonic mixers and CML loop dividers,” IEEE Trans. Microw. Theory Techn., vol. 62,no. 12, pp. 3065-3075, Aug. 2014.
[49] A. Musa, K. Okada, and A. Matsuzawa, “Progressive mixing technique to widen the locking range of high division-ratio injection-locked frequency dividers,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 3, pp. 1161-1173, Mar. 2013.
[50] F. H. Huang, D. M. Lin, H. P. Wang, W. Y. Chiu, and Y. J. Chan, “20 GHz CMOS injection-locked frequency divider with variable division ratio,” IEEE Radio Freq. Integr. Circuits Symp., pp. 469-472, Jun. 2005.
[51] M. A. Khan, Q. Chen, M. S. Shur, B. T. Mcdermott, and J. A. Higgins, “Microwave operation of GaN/AlGaN-doped channel heterostructure field effect transistors,” IEEE Electron Device Lett., vol. 17, pp. 325–327, July 1996.
[52] Y. F. Wu, B. P. Keller, S. Keller, D. Kapolnek, P. Kozodoy, S. P. DenBaars, and U. K. Mishra, “Very high breakdown voltage and large transconductance realized on GaN heterojunction field effect transistors,” Appl. Phys. Lett., vol. 69, no. 10, pp. 1438–1440, 1996.
[53] T. Mizutani, Y. Ohno, M. Akita, S. Kishimoto, and K. Maezawa, “A study on current collapse in AlGaN/GaN HEMTs induced by bias stress,” IEEE Trans. Electron Devices, vol. 50, pp. 2015–2020, Oct. 2003.
[54] J. H. Leach, and H. Morkoc, "Status of reliability of GaN-based heterojunction field effect transistors", Proceedings of the IEEE, vol. 98, pp. 1127-1139, 2010.
[55] S.–L. Jang, Y.-H. Chang, and W.-C. Lai,” A feedback GaN HEMT oscillator,” (ICIMMT 2018) Chengdu, Sichuan, China, May 6-9, 2018.
[56] S.–L. Jang, Y.-H. Chang, J.-S. Chiou and W.-C. Lai, “A single GaN HEMT oscillator with 4-path inductors,”IEEE ISNE-2018, Taipei, Taiwan 2018.
[57] S.-L. Jang, Ke Jen Lin, Wen Cheng Lai, and M.-H. Juang,” A capacitive cross-coupled GaN HEMT injection-locked frequency divider,” Int. Symp. VLSI Design, Automation and Test (VLSI-DAT), 2018.
[58] C. Sanabria, H. Xu, S. Heikman, U. K. Mishra, and R. A. York, “A GaN differential oscillator with improved harmonic performance,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 7, pp. 463–465, Jul. 2005.
[59] Y.-J. Su, S.–L. Jang, et al,” An 4.7 GHz low power cross-coupled GaN HEMT oscillator ,”Microw. Opt. Technol. Lett. Accepted 2018.
[60] Z. Q. Cheng, Y. Cai, J. Liu, Y.-G. Zhou, K. M. Lau, and K. J. Chen, “A low phase-noise X-Band MMIC VCO using high-linearity and low-noise composite-channel Al0.3Ga0.7N/ Al0.05Ga0.95N/GaN HEMTs,” IEEE Trans. Microwave Theory & Tech. vol. 55, issue 1, pp. 23-29, 2007.
[61] S. Lai, D. Kuylenstierna, M. Ozen, M. Horberg, N. Rorsman, I. Angelov, and H. Zirath, “Low phase noise GaN HEMT oscillators with excellent figures of merit,” IEEE Microw. Wireless Compon. Lett., vol. 24, pp.412-414, Apr. 2014.
[62] H. Liu, X. Zhu, C. C. Boon, X. Yi, M. Mao, and W. Yang, “Design of ultra-low phase noise and high power integrated oscillator in 0.25µm GaN-on-SiC HEMT technology,” IEEE Microw. Wireless Compon. Lett., vol. 24, pp. 120–122, 2014.
[63] W. Wohlmuth, M.-H. Weng, C.-K. Lin, J.-H. Du, S.-Y. Ho, T.-Y. Chou, S. M. Li, C. Huang, W.-C. Wang, and W.-K. Wang, “AlGaN/GaN HEMT development targeted for X band applications,” 2013 IEEE Int. Conf. Microwaves, Communications, Antennas and Electronic Systems pp.1-4.
[64] G. Soubercaze-Pun, J. G. Tartarin, L. Bary, J. Rayssac, E. Morvan, B. Grimbert, S. L. Delage, J.-C. De Jaeger, and J. Graffeuil, “Design of a X-band GaN oscillator: From the low frequency noise device characterization and large signal modeling to circuit design,” in IEEE MTT-S Int. Dig., Jun. 11–16, 2006, pp. 747–750.
[65] B. Razavi, “A study of phase noise in CMOS oscillators,” IEEE J. Solid-State Circuits, vol. 31, no. 3, pp. 331–343, Mar. 1996.
[66] S. Levantino, C. Samori, A. Zanchi, and A. L. Lacaita, “AM-to-PM conversion in varactor-tuned oscillators,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 49, no. 7, pp. 509–513, Jul. 2002.
[67] A. V. Vertiatchikh and L. F. Eastman, “Effect of the surface and barrier defects on the AlGaN/GaN HEMT low-frequency noise performance,” IEEE Electron Device Lett., vol. 24, no. 9, pp. 535–537, Sep. 2003.
[68] Z. Herbert, S. Lai, K. Dan, F. Jonathan, A. Kristoffer and R. Niklas, ” An X-band low phase noise AlGaN-GaN-HEMT MMIC push-push oscillator,” in Proc. IEEE Compound Semicond. Integr. Circuit Symp. (CSICS), Oct. 16–19, 2011, pp. 1–4.
[69] G. Soubercaze-Pun, J. G. Tartarin, L. Bary, J. Rayssac, E. Morvan, B. Grimbert, S. L. Delage, J.-C. De Jaeger, and J. Graffeuil, “Design of a X-band GaN oscillator: From the low frequency noise device characterization and large signal modeling to circuit design,” in IEEE MTT-S Int. Dig., Jun. 11–16, 2006, pp. 747–750.
[70] V. S. Kaper, V. Tilak, H. Kim, A. V. Vertiatchikh, R. M. Thompson, T.R.Prunty, L.F.Eastman, andJ. R. Shealy,“High-power monolithic AlGaN/GaN HEMT oscillator,” IEEE J. Solid-State Circuits, vol. 38, no. 9, pp. 1457–1461, Sep. 2003.