隨著生物醫學技術的興起，可植入性生物醫學系統變成非常熱門的一項新興研究領域。在此研究中使用TSMC 0.18 um 1P6M CMOS製程，設計了兩個可應用於生醫通訊系統使用的無線接收機基頻電路。
第一個電路設計做為可植入人體的體內接收機，因此設計著重在降低功率消耗，基頻電路具有56 dB的增益調整範圍，最高級最低增益分別為70 dB和14 dB，中頻操作頻率為20 kHz~100 kHz，後端的解調變電路使接收機可解調位振幅移鍵送訊號。由量測結果得知體內接收機整體功率消耗僅有319 uW，在資料傳輸速率1 kbps下接收靈敏度為-71 dBm (誤碼率 = 10-2)，最大輸入功率超過5 dBm，晶片面積為1.2 mm2 (1.1 mm x 1.3 mm)。
第二個電路做為體外接收機，用來接收體內發射機所送出的訊號，基頻電路提供500 kHz頻寬，可調增益範圍由20 dB至56 dB，接收機量測靈敏度為-65 dBm(誤碼率 = 10-2)，消耗功率16.7 mW，晶片面積為1.2 mm2 (1.1 mm x 1.3 mm)。
另外做了改善體外接收機基頻電路的設計，針對體外接收機直流偏移問題做改良，以混和訊號方式，利用逐次逼近法來調整放大器電流以達到校正偏移電壓的目的。電路還增加了自動增益控制的功能，可偵測輸入訊號強度調整電路增益，使輸出訊號適合下一級解調電路的振幅。增益調整範圍提升至72 dB，電路頻寬為400 kHz，由後模擬得到接收機靈敏度為-90 dBm，最大輸入功率超過-18 dBm，晶片消耗功率為27.2 mW，晶片面積為1.4 mm2 (1.17 mm x1.67 mm)。

With the advancement of biomedical technology, implantable chip systems have become a new research topic. This thesis presents two designs of baseband circuits for wireless biomedical receiver applications under TSMC 0.18 um 1P6M CMOS process.
The first circuit is designed as an implantable receiver which focuses on lowering the power consumption. The baseband circuit has a variable gain range of 56 dB with the highest and lowest gain of 70 dB and 14 dB respectively. The medium operating frequency is 20 kHz to 100 kHz. The demodulator at the back end can demodulate amplitude shift keying (ASK) signals. The implantable receiver has a power consumption of 319 uW, sensitivity of -71 dBm (BER≤ 10 -2) under 1 kbps data rate, maximum input power of 5 dBm, and a chip area of 1.2 mm2.
The second circuit is designed as an external receiver outside the body to receive signals from the implantable transmitter. The baseband circuit provides a 500 kHz bandwidth, a variable gain ranging from 20 dB to 56 dB, sensitivity of -65 dBm (BER≤ 10 -2), power consumption of 16.7 mW, and a chip area of 1.2 mm2.
In addition, improvements are made for the external receiver baseband circuit. In solving the DC offset problem, mixed signal method is utilized; successive approximation (SAR) is used to adjust the current of the amplifier in order to calibrate the DC offset. Furthermore, auto gain control function is added inside the circuit. The function can detect the input signal intensity and adjust the loop gain so that the output signal amplitude is suitable for the following stage demodulator circuit. The adjustable gain range is increased to 72 dB, the bandwidth of the circuit is 400 kHz. From the simulation results, the sensitivity of the receiver is -90 dBm, maximum input power of over -18 dBm, power consumption of 27.2 mW, and a chip area of 1.4 mm2.

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