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研究生: 戴品元
Pin-Yuan Dai
論文名稱: 多重宇宙: 輕量級公平性多路徑執行微架構
Multiverse: A Light-weight Fairness Multi-path Execution Micro-architecture
指導教授: 劉一宇
Yi-Yu Liu
口試委員: 方劭云
陳勇志
王國華
學位類別: 碩士
Master
系所名稱: 電資學院 - 資訊工程系
Department of Computer Science and Information Engineering
論文出版年: 2023
畢業學年度: 112
語文別: 英文
論文頁數: 71
中文關鍵詞: 推測執行亂序處理多路徑執行微處理器架構
外文關鍵詞: Speculative execution, Out-of-order execution, Multi-path execution, Micro-architecture
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現代處理器因為分支預測器投機執行的特性帶來了幽靈攻擊,讓使用者有資訊外洩的疑慮。這種攻擊藉由訓練預測器來操控用戶執行某些危險的指令,透過執行這些指令,攻擊者能夠存取到原無存取權的資料,進而造成安全性的疑慮。這篇論文將會探討透過拔除分支預測器來阻止攻擊者惡意訓練的行為,並將節省下來的資源投入到多路徑執行架構。我們提出的多路徑執行架構會公平地執行每一個平行路徑,此方式會讓攻擊者無法隨意操控流水線的指令,對於幽靈攻擊能有更高的防禦能力。本架構不僅節省了許多硬體資源,也增加處理器的安全性,與遇到分支指令即暫停的架構相比,也有更好的效能表現。


Due to the branch predictors, modern processors are susceptible to Spectre attacks, a speculative execution feature that raises concerns about user information leakage. These attacks manipulate the processor's behavior by training the predictor to execute potentially harmful instructions, allowing attackers to access privileged data, thereby raising security concerns. This thesis discusses how removing the branch predictor can prevent attackers from maliciously training and reallocating the saved resource to a multi-path execution architecture. Our proposed multiverse architecture can execute each path fairly, making it difficult for attackers to manipulate the instruction pipeline, thus offering a novel defense concept against some variants of Spectre attacks. Our architecture not only saves significant hardware resource but also enhances processor security, in addition, our work offers comparable and even better performance compared to architecture that stalls on unresolved branches, which provides a better way to against Spectre attack.

ABSTRACT v List of Tables ix List of Figures x CHAPTER 1. Introduction 1 CHAPTER 2. Preliminaries 4 2.1 Modern Processor 4 2.1.1 Out-of-order Pipeline 4 2.1.2 Branch Predictor 10 2.2 Hardware Threat 13 2.2.1 Side Channel Attack 13 2.2.2 Spectre Attack 15 2.3 Dual Path Execution 16 2.4 Motivation 20 CHAPTER 3. Multiverse Execution Architecture 22 3.1 Proposed Architecture 22 3.2 History Tag 25 3.3 Architecture Modification 27 3.3.1 Program Counter 27 3.3.2 Reorder Buffer 27 3.4 Arbiter Design. 30 CHAPTER 4. Experimental Results 40 4.1 Simulator Modification 40 4.2 Performance Comparison 42 4.3 Program Counter Analysis 44 4.4 Resource Analysis 52 4.5 Final Comparison 56 CHAPTER 5. Conclusions and Future Work 59 Bibliography 60 Appendix A. Detailed Experimental Results 63

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全文公開日期 2026/01/29 (國家圖書館:臺灣博碩士論文系統)
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