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研究生: 楊宗憲
Tsung-Hsien Yang
論文名稱: 有機薄膜電晶體及其閘極絕緣層表面處理技術之研究
Investigation on the Organic Thin-Film Transistor and Its Gate Insulator Surface Treatment
指導教授: 范慶麟
Ching-Lin Fan
口試委員: 李志堅
Chin-Chien Lee
徐世祥
Shih-Hsiang Hsu
張美濙
Mei-Ying Chang
王錫九
Shea-Jue Wang
顏文正
Wen-Cheng Yen
學位類別: 博士
Doctor
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 英文
論文頁數: 159
中文關鍵詞: 可靠度緩衝層表面處理電漿源/汲極通道尺寸蒸鍍速率五苯環有機薄膜電晶體
外文關鍵詞: reliability, buffer layer, surface treatment, source/drain electrodes, plasma, channel dimension, deposition rate, pentacene, organic thin-film transistor (OTFT)
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  • 在本研究中,我們分別針對pentacene有機薄膜電晶體的製程參數、表面處理技術與元件可靠度進行系統性地研究。在有機薄膜電晶體製程參數的研究中,我們使用不同的pentacene蒸鍍速率、改變元件通道尺寸及源/汲極材料,以觀察這些製程參數對有機薄膜電晶體電氣特性的影響。研究結果顯示,使用較慢的pentacene蒸鍍速率,可以成長較大的晶粒,因此元件的電氣特性可以獲得有效的改善。此外,我們也發現到使用下接觸式結構的有機薄膜電晶體,其載子移動率會隨著通道長度增長而增加。而在源/汲極電極材料對於有機薄膜電晶體的影響上,與使用鉻/銀或鉻/鉑做為有機薄膜電晶體的源/汲極相比,使用鉻/金做為源/汲極可以獲得較低的能障與接觸電阻,因此可以獲得較佳的元件特性。
    此外,我們提出以N2O與NH3電漿處理技術應用在有機薄膜電晶體的二氧化矽閘極絕緣層上,以改善元件的電氣特性。在使用N2O電漿處理技術的研究中,我們發現N2O電漿處理技術可以有效地降低二氧化矽表面粗糙度,進而提升pentacene的結晶性與降低pentacene與閘極絕緣層介面的缺陷密度,因此元件的特性可以有效地被改善。研究結果顯示,使用N2O電漿處理技術可以提升兩倍的元件輸出電流並且提高50%的載子移動率,此外介面缺陷密度可以降低31%。而在使用NH3電漿處理技術的研究中,我們發現使用NH3電漿處理技術可以改變二氧化矽閘極絕緣層的表面特性。藉由NH3電漿處理技術,二氧化矽表面可從親水性轉變成適合pentacene成長的疏水性表面,因此提升pentacene薄膜的結晶性。我們亦發現NH3電漿處理技術可有效處理二氧化矽表面的懸浮鍵結並降低pentacene與二氧化矽介面的缺陷密度,進而改善元件特性。因此,使用N2O與NH3電漿處理技術皆可以有效改善有機薄膜電晶體的特性。
    我們亦提出使用高分子材料-鐵氟龍(polytetrafluoroethylene, PTFE)沉積在有機薄膜電晶體的源/汲極及閘極絕緣層上方做為緩衝層以改善其特性。鐵氟龍薄膜具有適合pentacene成長的疏水性表面,因此可以改善pentacene的結晶性。我們使用紅外線光譜儀對沉積在鐵氟龍薄膜厚度為1.5 nm上的pentacene薄膜進行觀察,結果顯pentacene有機分子可以規則的垂直排列,因此可以獲得較佳的載子傳輸能力。此外,研究結果發現使用鐵氟龍薄膜作為緩衝層亦可有效地降低接觸電阻。與沒有使用鐵氟龍緩衝層的元件相比,有使用鐵氟龍緩衝層的元件其飽和電流與載子移動率分別可以提升93% 與105%。
    最後我們針對有機薄膜電晶體的可靠度進行研究。我們使用大氣及汲極偏壓對有機薄膜電晶體進行劣化測試。與大氣劣化測試相較,使用汲極偏壓劣化測試會對元件造成較大的性能衰退。此外,研究結果發現正汲極偏壓劣化測試會使得元件性能衰退更為嚴重。我們推測當元件在正汲極偏壓劣化測試下,較大的橫向與垂直電場會對元件造成嚴重的影響,使其通道層的本體缺陷密度大幅提升與大量帶正電的電荷注入至閘極絕緣層,導致元件特性嚴重衰退。


    In this thesis, we have systematically investigated the effects of device fabrication parameters, surface treatment techniques, and reliability of pentacene-based organic thin-film transistors (OTFTs). First, we investigated the effects of the pentacene deposition rate, channel dimension, source-drain contact barrier on the pentacene-based OTFTs performance. It was found that the slow deposition rate can grow larger pentacene grain size to improve the pentacene-based OTFTs performance. It was also observed that the field-effect mobility of the pentacene-based OTFTs was increased with increasing channel length. In addition, the Cr/Au as Source/Drain (S/D) electrodes exhibited the lower contact barrier and contact resistance, comparing with the Cr/Pt and Cr/Ag as S/D electrodes.
    In addition, the electrical characteristics of N2O-plasma treated pentacene-based OTFTs were investigated. The treatment can enhance the on current almost two times, increase the field-effect mobility greater than 50%, and reduce the interface traps to 31%, compared to devices without plasma treatment. This improvement is presumably owing to pentacene crystallization enhancement and the decreased traps state density between the pentacene and gate insulator interface. The N2O-plasma treated gate dielectric has been found effective in improving OTFT performance. Furthermore, the effects of NH3-plasma treatment on the gate insulator (SiO2) surface before pentacene deposition were also investigated. The NH3-plasma treatment can improve the interface property between SiO2/pentacene, providing a suitable surface for pentacene growth. Moreover, the NH3-plasma treatment can also help terminate dangling bonds at the SiO2 surface and thus reduce the interface trap-state density. The proposed method provides a simple and effective method for treating the interface between SiO2/pentacene, reducing interface traps and simultaneously improving pentacene crystallization.
    We also investigated the performance of bottom-contact pentacene-based organic thin-film transistors (OTFTs) with polytetrafluoroethylene (PTFE) as the buffer layer was investigated. PTFE can provide a hydrophobic surface to improve the crystallinity of the grown pentacene thin film. The crystallinity and molecular orientation of pentacene films were analyzed using Fourier transform infrared spectroscopy (FTIR). The results exhibited that the pentacene molecules were perpendicular to the 1.5 nm-thick PTFE surface, resulting in improved crystallinity and molecular orientation in pentacene films. The contact resistance (Rc) between the pentacene layer and source/drain electrodes can also be decreased as a result of carrier injection by tunneling through the thin PTFE layer (1.5 nm) to the pentacene layer. Compared to the device without PTFE as the buffer layer, the saturation drain current and field-effect mobility of the device were increased by 93% and 105%, respectively.
    Finally, we investigated the drain bias stress effect on the pentacene-based OTFT performance degradation in the atmosphere. The pentacene-based OTFTs under drain bias stress exhibited larger performance degradation than those under atmospheric stress. It was also found that the performance degradation under positive drain bias stress was larger than that under negative drain bias stress. We presume that OTFT performance degradation under positive drain bias stress resulted from large lateral electrical field and vertical electrical field, resulting in increased trap state density (Ntrap) in the bulk channel and carriers injection into the gate insulator, respectively.

    摘要.........................................................................I Abstract...................................................................III 誌謝 (Acknowledgement).......................................................V List of Tables............................................................VIII List of Figures.............................................................IX Chapter 1 Introduction.....................................................- 1 - 1.1 Overview of Organic Thin-Film Transistor...............................- 1 - 1.2 Organic Semiconductor Materials........................................- 2 - 1.2.1 Polymers.............................................................- 2 - 1.2.2 Small Molecules......................................................- 3 - 1.3 Transport Mechanisms of Organic Semiconductor..........................- 4 - 1.3.1 Hopping Mode.........................................................- 5 - 1.3.2 Multiple Trapping and Release (MTR) Mode.............................- 6 - 1.4 Structures of Organic Thin-Film Transistor.............................- 6 - 1.5 Operating Modes of Organic Thin-Film Transistor........................- 7 - 1.6 Motivation.............................................................- 8 - 1.7 Thesis Organization...................................................- 10 - Chapter 2 Linear Source Thermal Evaporation System Setup and Device Fabrication ..........................................................................- 25 - 2.1 Introduction..........................................................- 25 - 2.2 Linear Source Thermal Evaporation System Setup........................- 25 - 2.3 Device Fabrication Methods............................................- 26 - 2.3.1 Substrate and Gate Electrode........................................- 26 - 2.3.2 Gate Insulator......................................................- 26 - 2.3.3 Source and Drain Electrodes.........................................- 27 - 2.3.4 Channel Layer-Pentacene.............................................- 27 - 2.4 Electrical Parameters of OTFT.........................................- 28 - 2.4.1 Field-Effect Mobility (μEF).........................................- 28 - 2.4.2 Threshold Voltage (Vth).............................................- 29 - 2.4.3 Sub-threshold Swing (S.S.)..........................................- 30 - 2.4.4 ON/OFF current ratio (ION/OFF)......................................- 31 - Chapter 3 Effects of Device Fabrication Parameters........................- 43 - 3.1 Introduction..........................................................- 43 - 3.2 Device Fabrication Details............................................- 44 - 3.3 Results and Discussion................................................- 45 - 3.3.1 Pentacene deposition rate effect on the surface morphology and electrical characteristic of OTFTs...................................................- 45 - 3.3.2 Channel Dimension Effect............................................- 46 - 3.3.3 Source-Drain Contact Effect.........................................- 47 - 3.4 Conclusion............................................................- 48 - Chapter 4 Effects of Plasma Treatment on Gate Insulator Surface...........- 66 - 4.1 Introduction..........................................................- 66 - 4.2 Device Fabrication Details............................................- 67 - 4.2.1 N2O-Plasma Treatment................................................- 67 - 4.2.2 NH3-Plasma Treatment................................................- 68 - 4.3 Results and Discussion................................................- 68 - 4.3.1 N2O-Plasma Treatment Effect.........................................- 68 - 4.3.2 NH3-Plasma Treatment................................................- 70 - 4.4 Conclusion............................................................- 73 - Chapter 5 Effects of Polytetrafluoroethylene asBuffer Layer...............- 93 - 5.1 Introduction..........................................................- 93 - 5.2 Device Fabrication Details............................................- 94 - 5.3 Results and Discussion................................................- 95 - 5.4 Conclusion............................................................- 99 - Chapter 6 Reliability of Pentacene-based OTFT............................- 127 - 6.1 Introduction.........................................................- 127 - 6.2 Device Fabrication Details...........................................- 128 - 6.3 Results and Discussion...............................................- 128 - 6.4 Conclusion...........................................................- 131 - Chapter 7Conclusions and Further Works...................................- 143 - 7.1 Summary of the Thesis................................................- 143 - 7.2 Further Works........................................................- 145 - References...............................................................- 146 -

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