本論文著重在改善極化碼置信度傳播位元翻轉解碼的高疊代次數帶來的高延遲。透過分析演算法的方式，得知平行化在位元翻轉解碼的流程中是可行的，以此提出平行化的流程與架構，能夠以倍數縮減冗長的位元翻轉流程。若進一步將演算法中前半的BP decoder替換成BPL，能夠更有效利用架構中的BP decoder，達到再減少疊代次數的效果。架構中藉由一致化因子圖(uniform factor graph)來降低設計複雜度，基於bit-index置換的BPL則有助於將其整合進架構中。

This thesis is to a new structure for reducing the latency of Polar Code Belief Propagation Bit Flip Decoder. By analyzing the original algorithm of Bit Flip Decoder, we propose a flow and a structure of parallelized Bit Flip Decoder. Our proposed methods use much fewer iteration number than conventional ones. To further to reduce iteration number, we replace BP decoder by BPL. This way, we make our proposed method more efficient.

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