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研究生: Vaclav Grim
Vaclav Grim
論文名稱: 以雙振盪器為基礎之智慧型溫度感測器
Intelligent Temperature Sensor Based on Dual Oscillators
指導教授: 陳伯奇
Po-Ki Chen
口試委員: 沈中安
Chung-An Shen
鍾勇輝
Yung-Hui Chung
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2017
畢業學年度: 105
語文別: 英文
論文頁數: 51
中文關鍵詞: 溫度感測系統不匹配非溫敏電流源
外文關鍵詞: PTAT current source
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This thesis elaborates on different methods to accurately measure absolute temperature using CMOS integrated circuits, and to provide output value in a robust and easy to use manner. Proposed circuit comprises of a temperature sensitive relaxation oscillator, a reference oscillator and a counter. Output data are provided in plain binary format. The design is implemented using TSMC 0.25 m mixed-mode process. Both pre-simulation and post-simulation results prove the correctness of this approach. Post-layout simulation shows errors of ±1.5 °C across temperature range of 0 – 120 °C. The layout occupies chip area of 0.38  0.26 mm (excluding I/O pads). During the design process, a considerable number of Perl scripts were developed, to effectively conduct Hspice simulation batches and interpret their results. Although the circuit is usable on its own, it was originally intended to form a building block of a larger system of two oscillators, which would generate a sigma-delta bitstream by employing novel techniques of time-domain digital processing. Such extension is a subject of research of other students, who took on with this subject.

Table of Contents Acknowledgement ii Abstract iii Table of Contents iv List of Figures vii List of Tables Error! Bookmark not defined. Chapter 1 1 Introduction 1 1.1 Introduction 1 1.2 Motivation 1 1.3 Thesis Organization 2 Chapter 2 3 Literature Review 3 2.1 Sensors based on ring oscillator 3 2.2 Sensors based on Polysilicon resistors 4 2.3 Sensors based on bipolar transistors 5 2.4 Sensors based on metal resistors 6 Chapter 3 7 System Design 7 3.1 Block diagram 7 Chapter 4 10 Circuit Design 10 4.1 PTAT Current source 10 4.1.1 Current mirrors 12 4.1.2 Adjustable resistor 13 4.1.3 Startup circuit 15 4.2 Voltage reference 16 4.3 Comparator 17 4.4 H-bridge with timing capacitors 18 4.5 S-R latch 19 4.6 Output buffer 20 Chapter 5 21 Software tools extensions 21 5.1 QQHspice simulation job despatcher 21 5.2 Preprocessing script 22 5.2.1 *sweep 23 5.2.2 *corners 23 5.2.3 *mser 24 5.2.4 *ifpar, *ifcor and *ifbit 25 5.3 Postprocessing tools 26 5.3.1 hspice_reader 26 5.3.2 mt_reader 27 5.3.3 hspice_writer 27 5.4 Trimming script 27 Chapter 6 29 Pre-simulation results 29 6.1 Summary of device dimensions 29 6.2 Monte Carlo analysis 31 Chapter 7 33 IC Layout procedures 33 7.1 Resistor strings 33 7.2 Array of BJTs 34 7.3 Current mirrors 35 7.4 Comparator 36 7.5 Digital block 37 7.6 I/O pads 38 Chapter 8 40 Post-layout simulation 40 8.1 Monte Carlo analysis 40 8.2 Histograms 41 8.3 Performance summary 43 Chapter 9 44 Conclusion 44 References 45

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