本論文主要研製鎖相迴路之注入鎖定除頻器，以及注入鎖定倍頻器。在射頻電路中，特別是振盪器之設計，電晶體是重要的元件，因此針對電晶體的使用上，我們將一種新型元件應用於振盪器中。
在射頻積體電路系統中，整合性的需求越來越高的情況下，每個射頻電路方塊將會被整合進去晶片中。因此系統之雜訊的抑制能力必須相對的提高，否則電路間雜訊互相影響的情況越嚴重，則會造成各元件間的特性與效能越降低。嚴重時甚至會使其他元件的功能失去正常的工作狀態而造成電路誤動作。
壓控振盪器與除頻器是頻率合成器電路中主要的電路之一。對壓控振盪器而言，低相位雜訊可避免相鄰雜訊訊號經由混波轉換的干擾。而振盪器的輸出則經由除頻器來達成降頻的工作，因此，除頻器需具有高頻操作，寬的操作頻寬及低功率消耗。
首先，本論文呈現一個雙頻帶直接注入鎖定倍頻器，在電源電壓為0.7 V且注入電壓1 V時，在補償頻率1MHz點的相位雜訊分別為 -122.49 dBc/Hz及-112.78 dBc/Hz。此晶片本身的消耗功率為5.39 mW。High band Operation range為2.2 GHz，從3.9 GHz 至 6.1 GHz ，其百分比為44%；Low band Operation range為0.3 GHz，從1.7 GHz 至 2 GHz ，其百分比為16.2%，晶片面積為0.773 × 0.901 mm2。
其次，我們呈現一個多模數CMOS LC直接注入鎖定除頻器。在除三mode時，電源電壓為1.2 V，在補償頻率1MHz點的相位雜訊為-114.89 dBc/Hz，Locking range為0.8 GHz，從20.9 GHz 至 21.7 GHz，此時晶片本身的消耗功率為14.9 mW，可調電壓由0 V至1.2 V，其可調範圍為1.16 GHz，從6.21 GHz至7.37 GHz約為17.08 %的可調範圍；在除二mode時，電源電壓為0.9 V，在補償頻率1MHz點的相位雜訊為-130.98 dBc/Hz，Locking range為0.8 GHz，從15.2 GHz 至 16.0 GHz，此時晶片本身的消耗功率為3.97 mW；晶片面積為0.82 × 0.748 mm2。
最後，我們提出一個使用0.35μm製程的新型除三注入鎖定除頻器，此除頻器使用互補式交錯耦合CMOS LC共振腔實現，其外部訊號是透過兩個新型鬆餅狀MOSFET的Gate端注入。此除頻器是使用諧波項來達成除頻的效果。當外部注入信號為0dBm時，除三時其鎖定範圍為7 GHz 到 7.5 GHz；晶片面積為0.522 × 0.594 mm2。

This thesis presents the design of Injection - Locked Frequency Dividers (ILFDs) and Injection - Locked Frequency Doubler. In the radio-frequency integrated circuit (RFIC), transistors are constantly used for the RF circuit designs, especially for oscillators. Hence concerning the use of the transistors, we will apply the novel transistor into the oscillator.
As the integration requirements get more and more in the RFIC system, every RF block will be integrated into the chip. Therefore the ability of restraining noise must be enhanced relatively, or the mutual influences between the circuit blocks are stronger to make every element’s performance low. Even it will make the element’s function not to work ordinarily and then let the circuit get wrong function.
The key building blocks in the frequency synthesizer are the voltage controlled oscillator (VCO) and the high frequency divider circuit. Most importantly, low phase-noise is required to avoid corrupting the mixer-converted signal by close interfering tones for VCO circuit. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption.
Firstly, this thesis describes a dual resonance injection locked frequency doubler. At the supply voltage of 0.7 V and the injection voltage at 1 V, the output phase noise of the divider is -122.49 dBc/Hz and -112.78 dBc/Hz at 1 MHz offset frequency. The power consumption of divider core is 5.39 mW. High band Operation range is about 2.2 GHz, from 3.9 GHz to 6.1 GHz, which the percentage is about 44 %. Low band Operation range is about 0.3 GHz, from 1.7 GHz to 2 GHz, which the percentage is about 16.2 %. The die area is 0.773 × 0.901 mm2.
Secondly, we propose a CMOS LC-tank divider-by-3 injection locked frequency dividers with double mode. The supply voltage of divider by 3 is about 1.2 V, the output phase noise of the divider is -114.89 dBc/Hz at 1MHz offset frequency. The locking range is about 0.8 GHz, from 20.9 GHz to 21.7 GHz. The power consumption of divider core is 14.89 mW. Tuning range is about 1.16 GHz, from 6.21 GHz to 7.37 GHz, which the tunable range is about 17.08 %, while the control voltage was tuned from 0 V to 1.2 V. The supply voltage of divider by 2 is about 0.9 V, the output phase noise of the divider is -130.98 dBc/Hz at 1MHz offset frequency. The locking range is about 0.8 GHz, from 15.2 GHz to 16.0 GHz. The power consumption of divider core is 3.97 mW. The die area is 0.82 × 0.748 mm2.
Finally, the ILFD circuit is realized with a complementary cross-coupled CMOS LC-tank oscillator with a lossy resonator, and the external differential injection is carried out through the gates of two waffle MOSFETs. The self-oscillating ILFD is injection-locked by the third/first harmonic input to obtain the division order of three/one. An external injected signal power of 0 dBm provides a locking range from 7 GHz to 7.5 GHz in the divide-by-3 mode. The die area is 0.522 × 0.594 mm2.

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