X波段LC單級注入非線性注入鎖定倍頻器與氮化鎵製程注入鎖定倍頻器

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研究生：	張永鈞 Yong-Jun Chang
論文名稱：	X波段LC單級注入非線性注入鎖定倍頻器與氮化鎵製程注入鎖定倍頻器 X-BAND LC SINGLE-STAGE INJECTION NONLINEAR INJECTION-LOCKED FREQUENCY DOUBLER AND GAN INJECTION-LOCKED FREQUENCY DOUBLER
指導教授：	張勝良 Sheng-Lyang Jang
口試委員:	莊敏宏 Miin-Horng Juang 徐世祥 Shih-Hsiang Hsu 宋峻宇 Jiun-Yu Sung
學位類別：	碩士 Master
系所名稱：	電資學院 - 光電工程研究所 Graduate Institute of Electro-Optical Engineering
論文出版年：	2022
畢業學年度：	110
語文別：	英文
論文頁數：	105
中文關鍵詞：	頻率倍頻器、注入鎖定、八字電感、壓控振盪器、氮化鎵
外文關鍵詞：	Frequency Multiplier, Injection-Locked, 8-shaped Inductor, Voltage-Controlled Oscillator, Gallium Nitride
相關次數：	點閱：312 下載：15
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近年來隨著物聯網的蓬勃有越來越多的設備，所有的頻段規格都被規範在IEEE 802.11標準中，故精準地升頻並避免雜訊干擾以獲得正確、穩定地傳輸勢在必行。無線通訊速度在近十年更是以倍數成長，利用壓控振盪器(Voltage-Controlled Oscillator, VCO)升頻並用倍頻器(Multiplier)選擇頻率是較有效率的選擇。本論文第一、二顆晶片使用台積電(Taiwan Semiconductor) 0.18 微米雙極互補式金氧半場效電晶體技術製程製造，第三顆晶片則是以穩懋半導體(WIN semiconductors) 0.25 微米空乏型高電子遷移率電晶體(pHEMT)製程製造，設計應用於特定頻率的倍頻器。
第一部分使用SiGe異質電晶體非線性差動注入結合電感使內部保留奇次諧波，再將差動訊號混合至兩倍並獲得兩倍頻率。三倍頻在注入功率0分貝毫瓦與功率消耗7.6 毫瓦下，鎖定輸出頻率範圍介於1.77G至2.52G赫茲；六倍頻在注入功率0分貝毫瓦與功率消耗8毫瓦狀態下，鎖定輸出頻率範圍介於3.84G至5.04G赫茲，此晶片面積占用1.387平方毫米。第二部分使用互補式金屬氧化物電晶體，基於第一部分的設計，在電路尾部提供一偶次諧波阻抗，使頻率迴授進主電路，讓五倍頻率更少雜訊增加穩定度，進一步驗證理論推斷。五倍頻在注入功率0分貝毫瓦與消耗功率9.8毫瓦下，鎖定頻率在7.28G至8.22G赫茲，此晶片面積占用1.18平方毫米。第三部分採用穩懋半導體氮化鎵技術設計的倍頻器，採用互推式和非線性注入設計，當輸入功率0 分貝毫瓦與功耗316毫瓦，輸出頻率從9.505G到10.4542 G赫茲是連接三組由單一電感提供之阻抗，晶片面積為 1.0×1.0 平方毫米。 10.32 G赫茲載波的 1M赫茲偏移頻率處鎖定相位噪聲為 -128.94 dBc/Hz。

Nowadays, with AIoT technology more and more devices are needed, and all the frequency band specifications are also in the IEEE 802.11 standard specification, so it is imperative to accurately upconvert and avoid noise interference to obtain correct and stable transmission. The speed of wireless communication has grown exponentially in the past ten years. It is more efficient to use a Voltage-Controlled Oscillator (VCO) to increase the frequency and use a Multiplier to select the frequency. The first and second chips in this thesis are manufactured by Taiwan Semiconductor's 0.18-micrometers bipolar complementary MOSFET technology, and the third chip is WIN semiconductors' 0.25-micrometers depletion type High-Electron Mobility Transistor (pHEMT) process, frequency multipliers are designed for specific frequencies.
The first part uses SiGe hetero-transistor nonlinear differential injection combined with inductors to keep odd harmonics internally, and then push the differential signal to twice and get twice the frequency. The multiple-by-3 locked the output frequency range from 1.77G to 2.52G Hz when the injection power is 0 dBm and the power consumption is 7.6 mW. The multiple-by-6 locked output frequency range is from 3.84G to 5.04G Hz, and the chip area occupies 1.387 mm2.
The second part uses complementary metal oxide transistors to provide an even-order harmonic impedance at the tail of the circuit, so that the frequency is fed back into the main circuit, so that frequencies multiple-by-5 has less noise and increases stability, which further verifies the theoretical inference. The quintuple frequency is locked at 7.28G to 8.22G Hz under the injection power of 0 dBm and the power consumption of 9.8 mW, and the chip area occupies 1.18 mm2.
The third part adopts the frequency multiplier designed by WIN semiconductor GaN technology, using push-push and nonlinear shunt injection mixer design, the input power is 0 dBm, the power consumption is 316 mW, the output frequency is from 9.505 GHz to 10.4542 GHz, and the chip area is 1.0×1.0 mm2. Locked phase noise at a 1 MHz offset frequency of a 10.32 GHz carrier is -128.94 dBc/Hz.

摘要                                I
ABSTRACT                            II
致謝                                III
CONTENTS                            IV
LIST OF FIGURES                            VI
LIST OF TABLES                            VIII
CHAPTER 1     BACKGROUND & MOTIVATION                1
1    INTRODUCTION                        1
CHAPTER 2     OVERVIEW OF VOLTAGE-CONTROLLED OSCILLATOR    4
1    INTRODUCTION                        4
2    THEORY OF OSCILLATORS                    6
2.1    FEEDBACK OSCILLATORS (TWO PORTS)            7
2.2    NEGATIVE RESISTANCE AND RESONATOR (ONE PORT)        9
3    CATEGORY OF OSCILLATORS                    11
3.1    RING OSCILLATOR                        11
3.2    LC-TANK OSCILLATOR                    12
4    PERFORMANCE INDICATORS OF VOLTAGE-CONTROLLED OSCILLATOR    16
4.1    TUNING RANGE                        16
4.2    TUNING SENSITIVITY                    16
4.3    PHASE NOISE                        17
4.4    QUALITY FACTOR                        20
5    PASSIVE COMPONENTS DESIGN IN VCO            21
5.1    INDUCTOR DESIGN                        21
5.2    TRANSFORMER DESIGN                    28
CHAPTER 3     INJECTION LOCKED FREQUENCY SIXTUPLER IMPLEMENTED BY BICMOS PROCESS    32
1    INTRODUCTION                        32
2    CIRCUIT DESIGN                        33
2.1    ACTIVE CIRCUIT                        34
2.2    PASSIVE COMPONENTS                    37
3    SIMULATIONS AND MEASUREMENTS                40
3.1    INJECTION LOCKED ×3/×6 FREQUENCY MULTIPLIER        41
3.2    INJECTION LOCKED ×5/×10 FREQUENCY MULTIPLIER        50
CHAPTER 4     SINGLE-STAGE INJECTION-LOCKED FREQUENCY QUINTUPLER IN CMOS PROCESS    57
1    INTRODUCTION                        57
2    CIRCUIT DESIGN                        58
2.1    ACTIVE CIRCUIT                        59
2.2    PASSIVE COMPONENTS                    61
3    SIMULATIONS AND MEASUREMENTS                63
3.1    INJECTION LOCKED ×5 FREQUENCY MULTIPLIER        64
3.2    INJECTION LOCKED ×4/×6 FREQUENCY MULTIPLIER        71
CHAPTER 5     FREQUENCY DOUBLER BASED ON GAN BY USING EIGHT-SHAPED INDUCTOR    79
1    INTRODUCTION                        79
1.1    GAN PROCESS                        81
2    CIRCUIT DESIGN                        82
2.1    ACTIVE CIRCUIT                        83
2.2    PASSIVE COMPONENTS                    85
3    SIMULATIONS AND MEASUREMENTS                86
CHAPTER 6     CONCLUSION                    91
REFERENCES                            92


                                

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