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研究生: 張仕欣
Shih-Hsin Chang
論文名稱: 5.8 GHz主動式CMOS雙平衡混頻器研製
Development of 5.8 GHz Active CMOS Doubly-Balanced Mixers
指導教授: 曾昭雄
Chao-Hsiung Tseng
口試委員: 瞿大雄
Tah-Hsiung Chu
黃建彰
Chien-Chang Huang
陳筱青
Hsiao-Chin Chen
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2015
畢業學年度: 103
語文別: 中文
論文頁數: 58
中文關鍵詞: 主動式混頻器壓控振盪器閘極注入式架構。
外文關鍵詞: active mixer, VCO, gate-driven architecture
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本論文係使用TSMC 0.18 µm CMOS製程研製三顆應用於5.8 GHz非接觸式生理訊號雷達感測系統之主動式混頻器,分別為雙平衡混頻器、壓控振盪器與混頻器整合電路及低功耗雙平衡混頻器。雙平衡混頻器之負載級採用共模回授架構,以提升混頻器的線性度,其匹配網路則以RLC元件來實現。接著,將壓控振盪器與混頻器整合於單一晶片中,壓控振盪器採用LC互補式電晶體架構,具有較佳之相位雜訊。混頻器輸出端則使用LC低通濾波器抑制高頻諧波,以降低諧波對整體電路特性之影響。低功耗雙平衡混頻器之閘極偏壓設計於次臨界傳導區,並採用閘極注入式架構,以兼顧直流功率消耗與轉導值,且平衡-不平衡轉換器亦整合於單一晶片中。


This thesis presents three active mixers, namely doubly-balanced mixer, mixer with embedded VCO, and low-power gate-driven mixer, for the non-contact vital-sign radar sensor applications. All the developed mixers are fabricated in the TSMC 0.18 μm CMOS process. The load stage of the doubly-balanced mixer employs the common-mode feedback architecture to enhance the linearity of the mixer. In addition, the matching network is designed by the RLC lumped elements. The doubly balanced mixer is then integrated with an embedded VCO in a chip. The voltage-controlled oscillator adopts the LC complementary transistor architecture to achieve a better phase-noise performance. The LC lowpass filter is designed and connected with the output of mixer to suppresses the high frequency harmonics. By designating the gate bias in the subthreshold conduction region, the low-power gate-driven mixer can be implemented by considering the trade off of the DC power consumption and transconductance. Moreover, the baluns are also integrated in the chip.

目錄 摘要 目錄 第一章 緒論 1-1 研究動機與目的 1-2 非接觸式生理訊號雷達感測原理 1-3 文獻探討 1-4 章節說明 第二章 主動式CMOS雙平衡混頻器研製 2-1 雙平衡混頻器架構與原理簡介 2-2 雙平衡混頻器架構與原理簡介 2-3 壓控振盪器與混頻器之整合電路研製 2-3-1 壓控振盪器設計 2-3-2 壓控振盪器與混頻器整合電路之量測結果 第三章 主動式低功耗CMOS雙平衡混頻器研製 3-1 平衡-不平衡轉換器原理與設計 3-2 主動式低功耗雙平衡混頻器架構與原理簡介 3-3 主動式低功耗雙平衡混頻器研製 第四章 結論 參考文獻

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