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研究生： Sergio Fernandez Rojas
Sergio Fernandez Rojas
論文名稱： 採用SiC元件12 kW 單相功率因數修正器之研製
Design and Implementation of a 12 kW Single-Phase PFC Using SiC Devices
指導教授： 邱煌仁
Huang-Jen Chiu
口試委員: 楊宗銘
Chung-Ming Young
黃仁宏
Peter Huang
林景源
Jing-Yuan Lin
邱煌仁
Huang-Jen Chiu
學位類別： 碩士
Master
系所名稱： 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年： 2019
畢業學年度： 107
語文別： 英文
論文頁數： 100
中文關鍵詞： 功率因數矯修正 、平均電流模式控制 、碳化矽
外文關鍵詞： Power factor correction, average current mode control, silicon carbide
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    • 本研究並聯三個模組，設計與實現了輸出電壓 750 Vdc 功率 12 kW 之升壓型功率因數修正器。其中每一個模組都可以單獨輸出 4 kW，而 PFC 則是透過 Texas Instruments 所生產的平均-連續電流模式之類比控制器 UC3854B 達成，功率級元件則採用碳化矽材質的金屬氧化物半導體場效電晶體與二極體以提升效能而優於矽材質的相對品。測量結果顯示在 220 V 且滿載下能達到 97.1% 的效率與 0.995 的功率因數。每一個模組都有完整的湧浪電流限制、峰值電流限制、峰值功率限制、緩啟動、輸入電壓過低的保護功能，並且都被測試驗證過，可以在 180V 到 240V 輸入電壓下滿足效能需求。

    A 12 kW boost-power factor correction (PFC) converter for 750 Vdc output voltage is designed and implemented using three identical modules which are set in parallel configuration. Each module can work independently for a power rating of 4 kW, PFC is achieved for continuous conduction mode (CCM) average current mode (ACM) control using the Texas Instruments analog controller UC3854B. Silicon carbide (SiC) Metal Oxide Semiconductor Field Effect Transistor and diodes are used in the power stage in order to improve the performance compared to their silicon counterpart. Measurement results show an efficiency of 97.1% at nominal input voltage of 220 V and full load with a power factor of 0.995. Each module is fully functional and includes inrush current limiter, peak current limiter, peak power limiter, soft-start and low input voltage protection, the performance for input voltage range from 180V to 240V has also been tested showing satisfactory results for 4 kW output power per module.

    摘要 i Abstract ii Acknowledgements iii Contents iv List of Figures vii List of Tables x List of Abbreviations xi Chapter I Introduction 1 1.1 Motivation and Goals 3 1.2 Thesis Overview 4 Chapter II: PFC Circuit Analysis and Control Design 5 2.1 State-Space Averaging Model 5 2.2 Linearization Through Small Signal Approximation 8 2.2.1 DC Solutions 9 2.2.2 Two-input Two-Output Transfer Functions 10 2.3 Control Strategy: CCM-ACM 13 2.4 Current-Loop Control Design 15 2.4.1 Duty Cycle to Inductor Current Transfer Function 15 2.4.2 Current Sensing 15 2.4.3 Pulse Width Modulator 16 2.4.4 Current Compensator 17 2.5 Voltage-Loop Control Design 19 2.5.1 Current Command to Inductor Current Transfer Function 19 2.5.2 Diode Current to Inductor Current Transfer Function 20 2.5.3 Current Command to Output Voltage Transfer Function 22 2.5.4 Current Command Block 22 2.5.5 Output Voltage Error as Output Power Feedback 24 2.5.6 Voltage Compensator 25 2.6 Harmonic Distortion Considerations 26 Chapter III: Design Considerations 30 3.1 System Description 30 3.2 Specifications for Each Module 31 3.3 Inductor Design 31 3.4 Bulk Capacitor Array Design 33 3.5 MOSFET and Diode Selection 36 3.6 Bridge Selection 36 3.7 Current Sensing 37 3.8 UC3854B Configuration 39 3.8.1 Oscillator and Pulse Width Modulator 39 3.8.2 Input Voltage Sensing 40 3.8.3 Multiplier Setup 42 3.8.4 Current Compensator 43 3.8.5 Voltage Compensator 48 3.8.6 Harmonic Distortion Attenuation 50 3.8.7 Soft-Start 53 3.8.8 Current Limit Protection 54 3.8.9 Low Input Voltage Protection 55 3.9 Auxiliary DC supply 55 3.10 Gate Driver 56 3.11 Inrush Current Limiter 57 Chapter IV: Implementation and Results 58 4.1 PCB Design and Technical Considerations 58 4.1.1 High dV/dt node and High dI/dt Loop 58 4.1.2 Current Return Paths and Ground Planes 59 4.1.3 Shielding and Earthing 60 4.1.4 Thermal Dissipation 60 4.1.5 Current Sensor Layout 60 4.1.6 PCB Layout 61 4.2 Implementation 63 4.2.1 Circuit Schematics 63 4.2.2 Modules assemblage 67 4.3 Experimental Results 69 4.3.1 Measurement equipment 69 4.3.2 Individual modules results 69 4.3.3 Parallel configuration transient response 72 4.3.4 Parallel configuration dynamic response 74 4.3.5 Parallel configuration steady state response 76 Chapter V: Conclusions and Future Work 83 5.1 Conclusions 83 5.2 Future Work 83 References 84

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