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研究生: 賴啟倫
Chi-Lun - Lai
論文名稱: 針對高性能快閃記憶體裝置之工作集導向的緩衝區管理設計
A Working-Set-Aware RAM Buffer Management Design for High-Performance NAND-based Devices
指導教授: 吳晉賢
Chin-Hsien Wu 
口試委員: 謝仁偉
Jen-Wei Hsieh
張經略
Ching-Lueh Chang
修丕承
none
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2017
畢業學年度: 105
語文別: 中文
論文頁數: 51
中文關鍵詞: 固態硬碟非揮發性記憶體快閃記憶體
外文關鍵詞: Solid State Drive, non-volatile RAM, flash memory
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  • 近年來NAND flash memory被迅速地廣泛應用於桌上型電腦、儲存系統以及其他嵌入式裝置,由於它非揮發性、體積小、耐震性、高I/O效能與低功耗等獨特的優點,但也因為一些NAND flash memory的硬體限制,各種方法被提出用來改善快閃記憶體內部軟體及硬體元件,尤其是在SSD內部的RAM緩衝區管理已成重要的議題;SSD內部的RAM緩衝區主要用於資料緩衝區(Data Buffer)及映射緩衝區(Mapping Buffer),其中資料緩衝區可以處理頻繁的讀取和寫入請求,而映射緩衝區維持從邏輯位址到實體位址對應的映射資訊。我們還觀察到SSD的效能會隨著不同的工作負載特性而改變,因此我們提出了一個針對高性能快閃記憶體裝置之工作集導向的緩衝區管理設計,目的是分析工作負載特性並根據當前的working-set有效地管理RAM緩衝區,而實驗結果顯示在不同的工作負載下,我們的方法可以有效改善SSD的效能。


    Recently, NAND flash memory has been rapidly used on desktop computers, storage systems, and other embedded devices because of its unique advantages such as non-volatile feature, low-power consumption, small size, shock resistance, and high I/O performance. Due to the physical limitations of NAND flash memory, many management methods have been proposed to improve the internal software and hardware components of NAND flash memory. In particular, the internal RAM buffer management of SSDs that adopt NAND flash memory has become an important problem. SSDs’ RAM buffer is mainly used for data buffer and mapping buffer. Data buffer can handle frequently read and write requests and mapping buffer can maintain the mapping information from logical addresses to physical addresses. We also observe that the performance of SSDs could change with the different workload characteristics. Therefore, we propose a working-set-aware RAM buffer management design for high-performance NAND-based devices. The purpose of the thesis is to analyze the workload characteristics and effectively manage the RAM buffer based on the current working set. The experimental results show that the performance can be improved for different workloads.

    摘要 I ABSTRACT II 目錄 III 圖目錄 IV 表目錄 IV 第一章 緒論 1 1.1 前言 1 1.2 論文架構 4 第二章 背景知識與研究動機 5 2.1 固態硬碟(Solid State Drives)架構 5 2.2 快閃記憶體轉換層(Flash Translation Layer)與位址映射(Address Mapping) 6 2.3 RAM緩衝區管理 8 2.4 研究動機 14 第三章 研究方法16 3.1 整體架構(Overall Structure) 16 3.2 Working Set概念 19 3.3.1 Working Set Table 19 3.3.2 Working Set生命週期 21 3.3.3 Working Set犧牲者優先權 23 3.3 Cached Mapping管理 24 3.4 犧牲者選擇流程 (Victim Select Process) 29 第四章 實驗與效能分析 32 4.1 實驗環境 32 4.2 工作負載 33 4.3 實驗結果 34 4.3.1 服務時間(Service Time) 34 4.3.2 命中率(Hit Ratio)38 第五章 結論 41 第六章 參考文獻 42

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