本論文研究出一個以鎖相迴路為基礎且應用在頻譜感測系統的整數型頻率合成器，鎖相迴路包含的頻率範圍從440MHz到880 MHz。
本論文的整數型頻率合成器使用台積電0.18 μm CMOS製程實現，操作在1.8 V，晶片面積為1.799 mm2，功率消耗40.35 mW。參考訊號使用可產生42 MHz的石英震盪器輸入給除數為102之除頻器，產生出411 kHz的參考訊號，以此降低迴路除數與迴路頻寬內相位雜訊，最高頻帶與最低頻帶之量測結果在迴路頻寬內的輸出相位雜訊分別約為-72 dBc/Hz@100kHz與-63 dBc/Hz@100kHz。

An integer-N frequency synthesizer is proposed for the spectrum sensing system. The oscillating frequency of the integer-N frequency synthesizer is from 440 MHz to 880 MHz.

This integer-N frequency synthesizer is fabricated in a standard TSMC 0.18μm CMOS process, the power supply is 1.8 V, the chip area is 1.799 mm2 and the total power consumption is 40.35 mW. The reference frequency with low in-band noise in the closed loop, 411 kHz, is produced by the divide-by-102 frequency divider, and the input clock of the divide-by-102 frequency divider is a 42 MHz crystal oscillator. The measured phase noise of this synthesizer is -72 dBc/Hz@100 kHz and -63 dBc/Hz@100 kHz, for the lowest and highest frequency of oscillation, respectively.

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