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研究生: 施英睿
Ying-Jui Shih
論文名稱: 針對SLC/MLC雙模式快閃記憶體減少寫入放大之研究
Mitigating the Write Amplification Problem of Dual-mode Flash Memory
指導教授: 謝仁偉
Jen-Wei Hsieh
口試委員: 謝仁偉
Jen-Wei Hsieh
黃元欣
Yuan-Shin Hwang
吳晉賢
Chin-Hsien Wu
陳雅淑
Ya-Shu Chen
學位類別: 碩士
Master
系所名稱: 電資學院 - 資訊工程系
Department of Computer Science and Information Engineering
論文出版年: 2019
畢業學年度: 107
語文別: 英文
論文頁數: 50
中文關鍵詞: 快閃記憶體寫入放大
外文關鍵詞: Write Amplification, Flash Storage device, Solid-State Drive, Storage Systems
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1 Introduction 2 Background 3 Motivation 4 Fast and Reused Program Method 4.1 Overview 4.2 System Architecture 4.3 Encoding Scheme 4.4 Block Allocation 4.5 Garbage Collection 4.6 Examples of Write Request 5 Evaluation 5.1 Experimental Setup 5.2 Trace Characteristic 5.3 Experimental Result 5.3.1 Write Ampli cation 5.3.2 Average Write Response Time 5.3.3 Block Erase Count 6 Conclusion

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