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研究生: 陳威安
Weiliem Abubakar
論文名稱: 以模型為基礎分析超級電容器堆充放電、溫度及老化動態不均衡效應之交互影響
Model-based Analysis of the Interactions among the Charge Imbalance and the Nonhomogeneities in the Thermal and Aging Dynamics in an Ultracapacitor Stack
指導教授: 姜嘉瑞
Chia-Jui Chiang
口試委員: 姜嘉瑞
Chia-Jui Chiang
楊景龍
Jing-Long Yang
蔡大翔
Dah-Shyang Tsai
學位類別: 碩士
Master
系所名稱: 工程學院 - 機械工程系
Department of Mechanical Engineering
論文出版年: 2019
畢業學年度: 107
語文別: 英文
論文頁數: 102
中文關鍵詞: 超級電容老化超級電容器堆不均衡充放電
外文關鍵詞: ultracapacitor, ultracapacitor stack, ageing, unbalanced charging
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In electric vehicles, there is electrical energy storage such as battery and ultracapacitor. For ultracapacitor, those which are connected in series will be placed in one stack for the sake of achieving a targeting power. The non-homogeneity in the thermal conditions of all the cells may result in differences in the ageing behaviors among the cells, which in turn causes unbalanced charge/discharge characteristics. To comprehend further on, it is developed ultracapacitors’ ageing model to simulate in different ambient temperature between ultracapacitors stack’s interior and exterior and unbalanced charged discharge. Ultracapacitors which are conneted in series have same specification and same ambient temperature at outside, risk of unbalanced charging can still occur.The reason is the effect of internal volume’s temperature which are placed among ultracapacitors and different heat transfer convection between interior and outside. The high ultracapacitors’ temperature which are affected by the high charging current input also affect internal volume’s temperature. The purpose of applying PI controller in an ultracapacitor stack is to control an ultracapacitor stack’s voltage. While Balancing Cell help an ultracapacitor stack to balance voltage and make voltage kept in range between 1.35-2.7 Volt. The combination between PI controller and balancing cell helps an ultracapacitor stack perform longer.


In electric vehicles, there is electrical energy storage such as battery and ultracapacitor. For ultracapacitor, those which are connected in series will be placed in one stack for the sake of achieving a targeting power. The non-homogeneity in the thermal conditions of all the cells may result in differences in the ageing behaviors among the cells, which in turn causes unbalanced charge/discharge characteristics. To comprehend further on, it is developed ultracapacitors’ ageing model to simulate in different ambient temperature between ultracapacitors stack’s interior and exterior and unbalanced charged discharge. Ultracapacitors which are conneted in series have same specification and same ambient temperature at outside, risk of unbalanced charging can still occur.The reason is the effect of internal volume’s temperature which are placed among ultracapacitors and different heat transfer convection between interior and outside. The high ultracapacitors’ temperature which are affected by the high charging current input also affect internal volume’s temperature. The purpose of applying PI controller in an ultracapacitor stack is to control an ultracapacitor stack’s voltage. While Balancing Cell help an ultracapacitor stack to balance voltage and make voltage kept in range between 1.35-2.7 Volt. The combination between PI controller and balancing cell helps an ultracapacitor stack perform longer.

Acknowledgements i Abstract ii Contents iv List of Figures ix List of Tables x 1 Introduction 1 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Methodologies 4 2.1 Ultracapacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1.2 Principle of Ultracapacitor . . . . . . . . . . . . . . . . . . . 6 2.2 Unbalanced Charge and Discharge . . . . . . . . . . . . . . . . . . . 7 2.2.1 State of Charge(SOC)Unbalanced . . . . . . . . . . . . . . . 7 2.2.2 Total Capacity Differences . . . . . . . . . . . . . . . . . . . 7 2.2.3 Impedance Differences . . . . . . . . . . . . . . . . . . . . . 8 2.3 Experimental setup . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Software Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4.1 Matlab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4.2 Simulink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Ultracapacitor Cell Model and Stack Model 11 3.1 A Singel Cell Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.1 Equivalent Circuit Model . . . . . . . . . . . . . . . . . . . . 11 3.1.2 Thermal Model . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1.3 Ageing Model . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.1.4 Extended Model . . . . . . . . . . . . . . . . . . . . . . . . 21 3.2 A Ultracapacitor Stack . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3 PID Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4 Charge-Balancing Circuits . . . . . . . . . . . . . . . . . . . . . . . 24 3.4.1 Passive Resistors . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4.2 Switched Resistors . . . . . . . . . . . . . . . . . . . . . . . 25 3.4.3 DC/DC Converters . . . . . . . . . . . . . . . . . . . . . . . 25 3.4.4 Zener Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.5 Ultracapacitor Specification . . . . . . . . . . . . . . . . . . . . . . 26 4 Results and Discussion 27 4.1 Single Cell Model Validation . . . . . . . . . . . . . . . . . . . . . . 27 4.1.1 Single Cycle 7A . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.1.2 NYCC cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.2 Simulation Results of Ultracapacitors Stacks . . . . . . . . . . . . . 31 4.2.1 Two Ultracapacitors Stack with Open Loop Current Input . 31 4.2.2 Four Ultracapacitors Stack with Open Loop Current Input . 42 4.2.3 Nine Ultracapacitors Stack with Open Loop Current Input . 53 4.2.4 Nine Ultracapacitors Stack with Controlled Terminal Voltage 67 4.2.5 Nine Ultracapacitors Stack with Controlled Terminal Voltage and Balancing Cell . . . . . . . . . . . . . . . . . . . . . 75 5 Conclusion and Future Works 84 Appendix A { List of Symbols 85 Appendix B { List of Abbreviations 87 BIBLIOGRAPHY 88

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