研究生: |
李宏澤 Hung-Tse Lee |
---|---|
論文名稱: |
STT-RAM末級快取之低耗能設計 TSE: Two-Step Elimination for MLC STT-RAM Last-Level Cache |
指導教授: |
謝仁偉
Jen-Wei Hsieh |
口試委員: |
吳晉賢
Chin-Hsien Wu 劉一宇 Yi-Yu Liu 陳雅淑 Ya-Shu Chen |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 資訊工程系 Department of Computer Science and Information Engineering |
論文出版年: | 2019 |
畢業學年度: | 107 |
語文別: | 英文 |
論文頁數: | 43 |
中文關鍵詞: | 旋轉力矩轉移隨機存取記憶體 、多層單元 、能量消耗 、兩部驟轉換 、末級快取 |
外文關鍵詞: | STT-RAM, MLC, Energy consumption, Two-step transition, Last-level cache |
相關次數: | 點閱:295 下載:0 |
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