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研究生： 劉丞斌
Cheng-Chen Liu
論文名稱： 四相位注入鎖定除頻器及新式自我注入八相位振盪器
Quadrature Injection-Locked Frequency Divider and Novel Self-Injection Eight-phase VCO
指導教授： 張勝良
Sheng-lyang Jang
口試委員: 黃進芳
Jhin-fang Huang
徐敬文
Ching-wen Hsue
莊敏宏
Miin-horng Juang
馮武雄
Wu-shiung Feng
學位類別： 碩士
Master
系所名稱： 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年： 2008
畢業學年度： 96
語文別： 中文
論文頁數： 105
中文關鍵詞： 電壓控制振盪器 、四相位 、注入鎖定除頻器
外文關鍵詞： VCO, Quadrature, ILFD
相關次數： 點閱：221  下載：2 
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    • 這論文的第四章提出一個具有除二、除四的注入鎖定除頻器(ILFD)，此ILFD是由3.5GHZ的四相位電壓控制振盪器和用作注入訊號的兩個NMOS所組成。而製作上是採用TSMC 0.18-um CMOS 製程。核心消耗的功率是10.05mW，供應電壓為1.5V。當可變電壓vtune從0V到1.5V變化時，此除頻器的自我振盪器頻率是3.02GHz 到 3.53 GHz，除二鎖定範圍5.96GHz到7.68GHz。鎖定後的phase noise較鎖定前的為佳。四相位的輸出角度的誤差為0.14度。
    第五章提出一個新的技術去產生多相位，製作上是採用TSMC 0.35 μm SiGe 3P3M BiCMOS 製程。這個四相位的電壓控制振盪器(QVCO)，是由兩個注入鎖定除頻器(ILFDs)和一個尾電流的電晶體所組成。兩倍頻的注入訊號是由尾電流電晶體的汲極端產生，連結到另一個注入鎖定除頻器的注入電晶體之閘極端。而此顆八相位的電壓控制振盪器也這樣方式的技術，共利用四個VCO去互相注入而成。供應電壓為3V，在1MHZ時候的phase noise為-116.14 dBc/Hz，其頻率為2.92 GHz，而FOM為-171.3 dBc/Hz。
    第六章提出一個VCO結合鎖定除頻器(ILFDs)的架構。這個除四的注入鎖定除頻器，VCO的訊號經由尾電感產生second harmonic，再注入到 ILFD。VCO輸出訊號頻率為注入訊號的一半，而ILFD的輸出訊號為注入訊號的四分之一。製作上是採用TSMC 0.18-um CMOS 製程，供應電壓為1.5V。ILFD的工作頻率範圍為2.772GHZ 到 2.928GHZ，所對應到VCO為5.529GHZ~5.848GHZ。

    Chapter 4 in this thesis presents a new divide-by-2 and -4 injection-locked frequency divider (ILFD). The ILFD consists of a new 3.5 GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.18-μm CMOS technology and the core power consumption is 10.95 mW at the supply voltage of 1.5 V. The free-running frequency of the QILFD is tunable from 3.02 GHz to 3.53 GHz. At the input power of 0 dBm, the total divide-by-2 locking range is from 5.96 GHz to 7.68 GHz as the tuning voltage is varied from 0 V to 1.5 V. The phase noise of the locked output spectrum is lower than that of free running ILFD in the 2 mode. The phase deviation of quadrature output is about 0.14o .
    Chapter 5 presents a new technique for designing multi-phase VCOs, which were implemented in the standard TSMC 0.35 μm SiGe 3P3M BiCMOS process. The quadrature voltage-controlled oscillator (QVCO) consists of two direct- injection locked frequency dividers (ILFDs) with a tail MOSFET. The 2nd harmonic frequency component at the drain node of tail transistor in one ILFD is injected to the gate of injection MOSFET in the other ILFD to couple the two independent ILFDs. The eight- phase VCO is also designed with similar technique to couple four differential VCOs. At the supply voltage of 3.0 V, the output phase noise of the QVCO is -118.22 dBc/Hz at 1MHz offset frequency from the carrier frequency of 2.28 GHz, and the figure of merit is -173.25 dBc/Hz. At the supply voltage of 3.0 V, the total power consumption is 14.4 mW. At the supply voltage of 3.0 V, the output phase noise of the eight-phase VCO is -116.14 dBc/Hz at 1MHz offset frequency from the carrier frequency of 2.92 GHz, and the figure of merit is -171.3 dBc/Hz.
    Chapter 6 presents an integrated VCO injection-locked frequency divider (ILFD) circuit. The divide-by-4 injection locked frequency divider consists of a 2.8GHz nMOS-core VCO with a direct-injection MOSFET and the VCO is a 5.6GHz cross-coupled p-core CMOS VCO. The ILFD divides down the injection signal frequency by 4, while the VCO outputs a second harmonic using the tail inductor, and the harmonic is applied to the gate of injection in the ILFD. The ILFD outputs a signal with half of the fundamental frequency while the VCO outputs a signal with the fundamental frequency. The circuit is implemented in a standard 0.18-μm CMOS process. At the supply voltage of 1.5V, the ILFD can be tunable from 2.772GHZ to 2.928GHZ with a corresponding VCO frequency from 5.529GHZ~5.848GHZ.

    List of Figures III List of Tables VI CHAPTER 1 Introduction 1 1.1 Background 1 1.2 Thesis Organization 2 CHAPTER 2 Background of Oscillator 3 2.1 The Oscillator Theory 3 2.2The Sort of Oscillator 5 2.2.1 Ring Oscillator 5 2.2.2 LC Oscillator 7 2.2.3 Colpitts and Hartley 12 2.3 The Way to Judge VCO 15 2.3.1 Tuning Range 15 2.3.2 Phase Noise 19 2.3.3 Power and FOM 25 2.3.4 Q of Oscillator 25 CHAPTER 3 Design of VCO 28 3.1 Noise 28 3.1.1 Thermal noise 28 3.1.2 Flicker noise 30 3.1.3 MOS thermal noise 33 3.2 Varactor 36 3.2.1 MOS Varactor 37 3.2.2 Parasitic Resistance 38 3.2.3 Inversion-Mode and Accumulation-Mode MOS Capacitors 40 3.3 Inductor 44 3.3.1 Spiral Inductors 45 3.3.2 The Transformers 52 CHAPTER 4 CMOS Quadrature Injection-Locked Frequency Divider 56 4.1 Introduction 56 4.2 Circuit description 58 4.3 Measurement result 61 4.4 Conclusion 67 CHAPTER 5 Quadrature and Eight-phase VCOs Implemented with SiGe Injection Locked Frequency Dividers 68 5.1 Introduction 68 5.2 Circuit Design 70 5.3 Experimental of VCO 73 5.4 Eight-Phase VCO 75 5.4 Conclusion 77 CHAPTER 6 A Fully-Integrated VCO Injection-Locked Frequency Divider Circuit 80 6.1 Introduction 80 6.2 Circuit Design 81 6.3 Results and Discussion 84 6.4 Conclusion 88 References 89

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