本論文主要描述四個不同型式的壓控振盪器與頻率除頻器，其分別為“新型Hartley低相位雜訊壓控震盪器”、“新型Hartley注入鎖定除頻器”、 “CMOS Top-Series四相位輸出注入鎖定除頻器”及“雙頻帶注入鎖定除頻器”。前三電路皆採用台積電所提供之零點一八微米互補式金氧半製程所製造，後一電路皆採用台積電所提供之零點三五微米互補式金氧半製程所製造。
新型Hartley低相位雜訊壓控震盪器（VCO）與新型Hartley注入鎖定除頻器（ILFD）均是採用台積電0.18um 1P6M CMOS 製程所實現。VCO的電壓操作在1.9V時,調變頻率可從9.93GHz到11.59GHz，其消耗功率為15.58mW；其頻率為11.59GHz所量測的相位雜訊為-116.44dBc/Hz。ILFD的電壓操作在1.8V時，調變頻率可從4.13GHz到4.61GHz；注入功率大小在0dBm的訊號時，鎖定範圍從7.8GHz 到 9.4GHz；其消耗功率為6.3mW。
注入鎖定除頻器使用Top-Series的耦合方式自行產生四相位輸出。其電感採用3-D電感模式節省晶片面積，在電源電壓0.9V情況，可調頻率從2.02GHz到2.28GHz，注入功率大小為-8dBm的訊號時，頻率鎖定範圍從3.60GHz到6.05GHz；其功率消耗9.36mW，其量測相位差為0.19°。
雙頻帶注入鎖定除頻器是開關式電感雙頻帶注入鎖定除頻器，藉由開關電感的切換，可以達到雙頻帶除頻器。其自振頻率範圍在低頻帶和高頻帶分別是從1.89GHz到2.0GHz和從1.81GHz到1.90GHz。量測結果顯示其注入功率大小為0之訊號下，總鎖定頻率範圍為3.3GHz到4.8GHz；其電路操作在高頻帶的消耗功率為9.2mW及操作在低頻帶的消耗功率為17mW。

This thesis presents a novel Hartley low phase noise differential CMOS voltage-controlled-oscillator (VCO) and new CMOS Hartley injection-locked frequency divider (ILFD). The proposed VCO and ILFD were fabricated by the TSMC 0.18-μm 1P6M CMOS technology. The low phase noise VCO adopts full PMOS to achieve a better phase noise performance. The proposed VCO operates from 9.93GHz to 11.61GHz with 14.47% tuning range. The measured phase noise at 1-MHz offset is about -116.44dBc/Hz at 11.59GHz. The power consumption of the VCO core is 15.58mW at the supply voltage of 1.9V. The free-running frequency of the ILFD is tunable from 4.13GHz to 4.61GHz. At the input power of 0dBm, the total divide-by-2 locking range is from 7.8GHz to 9.4GHz as the tuning voltage is varied from 0V to 1.8V. The core power consumption is 6.3mW at the supply voltage of 1.8V.
A novel divide-by-2 injection-locked frequency divider (ILFD). The ILFD consists of a 2.1GHz top-series quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed ILFD uses 3-dimensional inductor to save chip area and has been implemented with the TSMC 0.18-μm 1P6M CMOS technology. The core power consumption is 9.36mW at the supply voltage of 0.9V. The free-running frequency of the ILFD is tunable from 2.02GHz to 2.28GHz. At the input power of -8dBm, the total divide-by-2 locking range is from 3.6GHz to 6.05GHz as the tuning voltage is varied from 0V to 0.9V. The phase noise of the locked output spectrum is lower than that of free running ILFD in the mode. The phase deviation of quadrature output is about 0.19°.
Dual-band divide-by-2 CMOS LC-tank injection-locked frequency divider (ILFD) has been proposed and implemented in a 0.35-μm 2P4M CMOS process. By switching on/off the inductor switch, a dual-band frequency divider can be obtained. The self-oscillating tuning ranges of low-frequency and high-frequency band are respectively from 1.89GHz to 2GHz and from 1.81GHz to 1.9GHz. The total locking range is from 3.3GHz to 4.8GHz at the input power of 0dBm. The core power consumption is 9.2mW for high-frequency band and 17mW for low-frequency band at the supply voltage of 2V.

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