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研究生: 陳正億
Cheng-I Chen
論文名稱: 使用嵌入式互補開口諧振器抑制寬頻同步切換雜訊
Broadband Simultaneous Switching Noise Suppression with Embedded Complementary Split-Ring Resonators
指導教授: 林丁丙
Ding-Bing Lin
口試委員: 曾昭雄
Chao-Hsiung Tseng
邱政男
Cheng-Nan Chiu
吳宗霖
Tsung-Lin Wu
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2020
畢業學年度: 108
語文別: 中文
論文頁數: 67
中文關鍵詞: 同步切換雜訊電源輸送網路電源完整性互補開口諧振器多層印刷電路板短路導孔
外文關鍵詞: Simultaneous Switching Noise, Power Delivery Network, Power Integrity, Complementary Split Ring Resonators, Multi-layer Printed Circuit Board, Shorting Via
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  • 本論文主要研究在多層電路設計中,因數位IC本身快速切換產生瞬時電流,進而在另一端的類比IC產生同步切換雜訊(Simultaneous Switching Noise, SSN)。此雜訊會在電源輸送網路(Power Delivery Network, PDN)中傳播,使整個系統電路的電源完整性(Power Integrity, PI)受到影響。而在論文中,首先改變互補開口諧振器(Complementary Split Ring Resonators, CSRRs)結構來增加電感值達到抑制更低頻電源雜訊的效果。接著,主要的多層印刷電路板(Multi-layer Printed Circuit Board)設計中心理念是透過非週期性的嵌入互補開口諧振器並且加入短路導孔(Shorting Via)分析via間距與數量的影響,最後調整此結構的板材厚度來達到較佳的抑制效果。另外,因為非週期性結構的關係,比傳統上的週期性EBG來得省面積省成本並且有更佳的電源雜訊抑制效果,在此架構中頻寬範圍從0.072GHz至10GHz以上皆抑制於-40dB以下。


    This thesis mainly studies that in multi-layer circuit design, the factor-bit IC itself rapidly switches to generate instantaneous current, and then generates simultaneous switching noise (SSN) at the other end of the analog IC. This noise will propagate in the Power Delivery Network (PDN), which will affect the power integrity (PI) of the entire system circuit. In this thesis, firstly, the structure of complementary split-ring resonators (CSRRs) is changed to increase the inductance value to achieve the effect of suppressing lower frequency power supply noise. Next, the main multi-layer printed circuit board design center idea is to analyze the effect of via spacing and quantity by non-periodic embedded complementary split-ring resonators and adding shorting via, and finally adjust the plate thickness of the structure can achieve better suppression effect. In addition, because of the relationship of the non-periodic structure, it saves area and cost compared with the traditional periodic EBG and has a better power supply noise suppression effect. In this architecture, the bandwidth range from 0.072GHz to above 10GHz is suppressed below -40dB.

    摘要................................................................................................................................. i ABSTRACT ................................................................................................................... ii 誌謝.............................................................................................................................. iii 目錄............................................................................................................................... iv 圖目錄........................................................................................................................... vi 表目錄........................................................................................................................... ix 第一章 緒論.................................................................................................................. 1 1.1研究動機與目的.............................................................................................. 1 1.2文獻探討.......................................................................................................... 3 1.2.1去耦合電容元件................................................................................... 4 1.2.2平行板共振腔架構............................................................................... 6 1.2.3 電磁能隙架構...................................................................................... 7 1.2.4 互補開口諧振器.................................................................................. 9 1.3 論文架構....................................................................................................... 11 第二章 同步切換雜訊及互補開口諧振器................................................................ 12 2.1同步切換雜訊成因及相關案例探討............................................................ 12 2.2基本理論........................................................................................................ 15 2.2.1 傳輸線原理........................................................................................ 15 2.2.2 耦合微帶傳輸線原理........................................................................ 17 2.2.3 微波濾波器........................................................................................ 22 2.2.4 互補開口諧振器................................................................................ 26 第三章 抑制寬頻同步切換雜訊設計 ...................................................................... 30 3.1 概述............................................................................................................... 30 3.2 CSRRs之結構改善 ....................................................................................... 32 3.3 嵌入式CSRRs結構 ..................................................................................... 33 v 3.3.1 Shorting Via間距與數量分析 ........................................................... 37 3.3.2 板材厚度調整及參數分析................................................................ 39 3.4 量測驗證....................................................................................................... 41 第四章 結論................................................................................................................ 49 參考文獻...................................................................................................................... 50

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