研究生: |
涂詠翔 Yong-Xiang Tu |
---|---|
論文名稱: |
基於基因演算法於不同負載情境下之全橋相移轉換器效率最佳化設計 Optimal Efficiency Design of a Full-Bridge Phase-Shift Converter Under Different Load Conditions Based on Genetic Algorithm |
指導教授: |
劉益華
Yi-Hua Liu |
口試委員: |
邱煌仁
Huang-Jen Chiu 王順忠 Shun-Chung Wang 鄧人豪 Jen-Hao Teng 鄭于珊 Yu-Shan Cheng 劉益華 Yi-Hua Liu |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電機工程系 Department of Electrical Engineering |
論文出版年: | 2023 |
畢業學年度: | 111 |
語文別: | 中文 |
論文頁數: | 81 |
中文關鍵詞: | 全橋相移轉換器 、零電壓切換 、效率最佳化 |
外文關鍵詞: | Full-Bridge Phase-Shift Converter, Zero Voltage Switching(ZVS), Efficiency Optimization |
相關次數: | 點閱:305 下載:2 |
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近年電動車輛越來越普及,電動車充電器使用之直流-直流轉換器(DC-DC Converter, DDC)的設計也就隨之重要,充電用DDC並非在任何負載情況下都能保持最高效率,如果充電用DDC操作在效率較低的情況,其會有發熱發燙的問題,這會使得DDC的使用壽命減少以及散熱設計不易。全橋相移轉換器(Full-Bridge Phase-Shift Converter)是普遍應用於高功率應用場合的高功率隔離型DDC,在傳統的設計方法中,全橋相移轉換器會針對特定負載情況進行設計,但充電用DDC時常操作在不同負載情境,因此,傳統設計方法有其侷限。此外,在輕載的情況下,全橋相移轉換器的一次側開關無法達成零電壓切換,所以輕載時的效率相較於中、重載低很多,許多改善法如增加一次側諧振電感或根據不同負載改變控制或調變法陸續被提出,但上述方法會有相對應的缺點如元件/成本增加以及控制複雜度變高等。因此,本文提出針對多重負載情境,以提高轉換器總體效率為目標之設計方法。
本研究提出一種基於基因演算法(Genetic Algorithm, GA)的全橋相移轉換器效率最佳化設計方法,針對不同負載情境進行最佳化。本研究以效率最佳化為目標,利用基因演算法搜索最佳的轉換器參數配置。在設計過程中,考慮了負載變化對轉換器效率的影響,並進行了多種負載情境下的實驗驗證。本文精準地預測出不同負載情況下的電流波形,根據損耗模型估算出損耗,並使用基因演算法來尋找綜合效率最高的參數值,可以有效減小全橋相移轉換器在不同負載情境下的損耗,改善轉換器發熱發燙的問題。本文將所提出之設計方式與英飛凌設計手冊之設計方法以及傳統設計方法進行比較,並實現1 kW 全橋相移轉換器。經實際量測,本文所提方法在五階段定電壓充電情境下之綜合效率為93.58 %,較英飛凌設計手冊之設計方法改善1.05 %,較傳統設計方法提升0.2 %。
In recent years, electric vehicles (EVs) have become increasingly popular, and the design of the DC-DC converter (DCC) used in EV chargers has become increasingly important. The charging DDC cannot maintain its highest efficiency under all load conditions. If the DDC operates at a lower efficiency during charging, it may experience heating issues, resulting in reduced lifespan and challenging heat dissipation design. On the other hand, the Full-Bridge Phase-Shift Converter is a isolated DDC commonly used in high-power applications. In traditional design methods, the Full-Bridge Phase-Shift Converter is designed for specific load conditions. However, the charging DDC often operates under various load scenarios, limiting the effectiveness of the traditional design approach. Furthermore, under light load conditions, the Full-Bridge Phase-Shift Converter's primary-side switches cannot achieve zero-voltage switching, resulting in significantly lower efficiency compared to medium and heavy loads. Several improvement methods have been proposed, such as adding a primary-side resonant inductor or adjusting control and modulation techniques based on different loads. However, these methods have corresponding drawbacks, including increased component costs and increased control complexity. Therefore, this thesis proposes a design approach targeting multiple load scenarios to improve the overall efficiency of the converter.
This study proposes a genetic algorithm (Genetic Algorithm, GA) based efficiency optimization design method for a full-bridge phase-shift converter, which is optimized for different load scenarios. Aiming at efficiency optimization, this study uses genetic algorithm to search for the best converter parameter configuration. During the design process, the influence of load changes on the converter efficiency was considered, and experiments under various load scenarios were carried out to verify. This paper accurately predicts the current waveform under different load conditions, estimates the loss according to the loss model, and uses the genetic algorithm to find the parameter value with the highest overall efficiency, which can effectively reduce the loss of the full-bridge phase-shift converter under different load conditions and improve the problem of converter heating. This article compares the proposed design method with the design method of the Infineon design manual and the traditional design method, and realizes a 1 kW full-bridge phase-shift converter. According to actual measurements, the overall efficiency of the method proposed in this paper is 93.58% under the five-stage constant voltage charging scenario, which is 1.05% better than the design method in the Infineon design manual and 0.2% higher than the traditional design method.
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