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研究生: 楊繼彥
Chi-Yen Yang
論文名稱: 一個基於 TLC 快閃記憶體之減緩保留錯誤與讀取干擾錯誤的高錯誤率狀態感知之編碼方法
A High-BER-aware Coding Method for Mitigating Retention Errors and Read-Disturb Errors in TLC NAND Flash Memory
指導教授: 吳晋賢
Chin-Hsien Wu
口試委員: 吳晋賢
Chin-Hsien Wu
謝仁偉
Jen-Wei Hsieh
修丕承
Pi-Cheng Hsiu
陳雅淑
Ya-Shu Chen
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 中文
論文頁數: 55
中文關鍵詞: 快閃記憶體可靠性保留錯誤讀取干擾錯誤
外文關鍵詞: Flash Memory, Reliability, Retention Error, Read-disturb Error
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  • 由於快閃記憶體具有有限的P/E cycles,因此超過快閃記憶體單位限制的P/E cycles後會出現嚴重的可靠性問題,資料只能在有限的時間(即保留時間)或有限的讀取周期內安全地儲存。隨著資料的保留時間增加,保留錯誤錯誤率也會逐漸增加。另一方面,隨著資料讀取週期的增加,讀取干擾錯誤率也會增加,一旦保留錯誤率超出ECC的校正能力,資料的可靠性就會受到顯著的影響。在本文中,我們將提出一種基於 TLC 快閃記憶體之減緩保留錯誤與讀取干擾錯誤的高錯誤率狀態感知之編碼方法,藉由減少高錯誤率狀態的數量以改善快閃記憶體的可靠度。根據實驗結果,比起先前相關研究我們可以更有效地減少長時間儲存下資料的保留錯誤率與高讀取週期下的讀取干擾錯誤率。


    Especially when the P/E cycles of NAND flash memory is exceeding its limit,
    data can only be safely stored in the NAND flash memory for a limited time (i.e., the retention time) or a limited read cycles. As the retention time increases, the retention errors continue to increase. On the other hand, as the read cycles increase, the read-disturb errors also increase, and the total bit error rate (BER) could exceed the ECC (error correction code) capability. In the paper, we will propose a high-BER-aware coding method for mitigating retention errors and read-disturb errors in 3D TLC NAND flash memory. According to the experimental results, we can show that the proposed method can effectively reduce the retention errors for data stored for a long time and the read-disturb errors for data under high read cycles, when compared to the previous methods.

    Abstract Contents List of Figures List of Tables 1 Introduction 2 Background Knowledge 2.1 NAND Flash Memory 2.2 Errors in TLC NAND Flash Memory 3 Related Work 3.1 Error Correction Code 3.2 Reference Voltage Shifting 3.3 Data Rewriting/Refreshing 3.4 Data Coding 4 Motivation 5 A High­BER­aware Coding Method for Mitigating Retention Errors and ReadDisturb Errors 5.1 System Architecture 5.2 High Bit­Error­Rate States in 3D TLC NAND Flash Memory 5.2.1 High Bit­Error­Rate States for Retention Errors 5.2.2 High Bit­Error­Rate States for Read­Disturb Errors 5.3 A High­BER­aware Coding Method 5.3.1 A Bit­Flip Flag 5.3.2 State Groups 5.3.3 Conversion between State Groups 5.3.4 A Retention­Error­aware Conversion Coding (ReTen) 5.3.5 A Read­Disturb­Error­aware Conversion Coding (ReDis) 5.4 An Enhancement Bit­Flip Flag for the Retention­Error­aware Conversion Coding (ReTen+EF) 6 Performance Evaluation 6.1 Experimental Environment and Performance Metrics 6.2 Retention Errors 6.3 Read­Disturb Errors 7 Conclusion References

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