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研究生: 方萬信
Sapta Setiawan
論文名稱: 時域三角積分智慧型溫度感測
Time-Domain Sigma Delta Smart Temperature Sensor
指導教授: 陳伯奇
Poki Chen
口試委員: 陳信樹
Hsin-Shu Chen
鍾勇輝
Yung-Hui Chung
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2018
畢業學年度: 106
語文別: 英文
論文頁數: 76
中文關鍵詞: 智慧型溫度感測器時域三角積分調變弛張振盪器消弭三階梯度誤差布局同重心責任週期
外文關鍵詞: smart temperature sensor, time-domain sigma delta modulator, relaxation oscillator, third-order gradient error cancellation layout, common centroid, duty cycle
相關次數: 點閱:362下載:3
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  • 本論文提出一嶄新以振盪器為基礎之時域三角積分智慧型溫度感測器,該三角積分調變器將溫敏振盪頻率轉換成對應待測溫度之一位元資料串。弛張振盪器用來產生與溫度成正比、成反比以及與溫度無關之振盪頻率供調變器使用,本論文總共設計兩個版本,第一版使用兩組彼此獨立之正負溫敏振盪器,第二版則將兩組振盪器合而為一,透過內部開關切換所需之正負溫敏震盪頻率,以壓低製程變異對兩者的影響並節省晶片面積。相關布局採用可以消弭三階梯度之樣式,以確保關鍵元件間的匹配程度。兩個版本的布局緊密靠在一起,以求得公平的效能比較。本電路採用台積電0.25m標準CMOS製程來設計,總晶片面積為0.99503×0.99503mm2 ,在2/5伏供應電壓下消耗0.375mW。


    This thesis provides a new concept of implementing oscillator-based time-domain sigma delta smart temperature sensor. The time-domain sigma delta modulator converts the temperature-sensitive frequency into 1-bit data stream corresponding to the test temperature. Relaxation oscillator is utilized to generate PTAT, CTAT, and temperature compensated frequencies for the modulator. Two versions of smart temperature sensor are designed. The first version implements two separated PTAT and CTAT temperature-sensitive oscillators to generate frequency dependent signal. The second version combines both PTAT and CTAT oscillators into one to share most of the circuit area and reduce the impact of process variation. The third-order gradient error cancellation layout pattern is applied in the sensor layout to match the critical devices. Both versions of the smart temperature sensor are drawn side by side in the chip during layout for a fair performance comparison. The design is implemented in a TSMC 0.25m standard CMOS process. Post-layout simulation result shows that the duty cycle of the output bit stream changes proportionally to the temperature variation. The total chip area is 0.99503×0.99503mm2 and 0.375mW power consumption at 2.5V supply voltage.

    Acknowledgement iii 摘要 iv Abstract v Table of Contents vi List of Figures ix List of Tables xiii Chapter 1 1 Introduction 1 1.1 Introduction 1 1.2 Motivation 3 1.3 Thesis Organization 4 Chapter 2 5 Sigma Delta Modulator and Relaxation Oscillator 5 2.1 Sigma Delta Modulator 5 2.1.1 Nyquist Rate Converter and Oversampled Converter 5 2.1.2 Quantization Noise 7 2.1.3 Sigma Delta Architecture 9 2.2 Relaxation Oscillator 12 Chapter 3 17 Design of Time-Domain Sigma Delta Smart Temperature Sensor 17 3.1 Temperature Compensated Relaxation Oscillator 17 3.2 Temperature Sensitive Relaxation Oscillator 20 3.2.1 PTAT Temperature Sensitive Relaxation Oscillator 20 3.2.2 CTAT Temperature Sensitive Relaxation Oscillator 22 3.2.3 Combined PTAT and CTAT Temperature Sensitive Relaxation Oscillator 24 3.3 Time-Domain Sigma Delta Smart Temperature Sensor 27 3.3.1 First-Order Time-domain Sigma Delta Modulator 27 3.3.2 Smart Temperature Sensor using Separated PTAT and CTAT Relaxation Oscillators 35 3.3.3 Smart Temperature Sensor using Combined PTAT and CTAT Relaxation Oscillators 40 Chapter 4 44 Layout Implementation 44 4.1 Third-Order Gradient Error Cancellation Layout Pattern 44 4.1.1 Layout Pattern Generation 45 4.1.2 Local Layout for Matching 5 Transistors in PMOS Current Mirror 47 4.1.3 Local Layout for Matching 3 NMOS Transistors in Temperature Compensated Oscillator 49 4.1.4 Local Layout for Matching 2 NMOS Transistors of Active Loaded Inverters in Temperature Sensitive Oscillator 50 4.2 Common Centroid Layout for Resistor and Capacitor 51 4.3 Overall Layout 54 Chapter 5 58 Simulation Results 58 5.1 Pre-Layout Simulation Results 58 5.2 Post-Layout Simulation Results 63 5.3 Circuit Design Parameters 68 Chapter 6 72 Conclusion 72 References 74

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