本論文主要探討光通訊接收端積體電路的設計與實現，包含光偵測器、增益自動控制的轉阻放大器與時脈資料回復電路。
第一部份利用商用矽鍺基製程實現了光偵測器，使用台積電(TSMC) 0.35μm SiGe BiCMOS製程,探討光電晶體的電流增益特性與指叉式佈局來增加光偵測器的使用效率。量測結果顯示該光偵測器可以操作在低於1V的供應電壓，響應度在650nm時為0.293mA/W，850nm時為0.15mA/W。
第二部份為一種轉阻放大器的實現，使用台積電(TSMC) 0.35μm SiGe BiCMOS製程，採用RGC架構作為輸入級，有效隔絕了輸入的寄生電容，提高了頻寬表現。在供應電壓3.3V與輸入電容0.25pF時，增益為58.47 dBΩ，頻寬為2.78GHz，總功率消耗58.6mW。
第三部份利用前面的設計加上了可變增益的轉阻放大器放大器和自動增益控制電路，使用台積電(TSMC) 0.35μm SiGe BiCMOS製程來實現。於供應電壓3.3V與輸入電容0.25pF時量測所得輸入動態範圍2.5~180μA，動態增益範圍65.7~83 dBΩ，對應動態頻寬為1.8~2GHz，最高可工作於2.5Gbps，總功率消耗143.5mW。
最後，我們設計與模擬可快速鎖定的時脈資料回復電路，並採用閘控式電壓控制振盪器。本設計可大幅縮減鎖定時間，模擬結果顯示其最高傳輸速率為900Mbps。

In this thesis, the design and fabrication of integrated optical receiver devices are presented, including a photodetector, an automatic-gain- control (AGC) transimpedance amplifier (TIA) and a clock and data recovery (CDR).
In the first part, we present a photodetector using the TSMC 0.35μm SiGe BiCMOS 3P3M process. The responsivity of detector can be enhanced by the gain of BJT and the finger-type layout. The test chip works below 1V supply and the responsivities are 0.293mA/W for the red light at 650nm and 0.15mA/W for the IR light at 850nm.
In the second part, the design of a TIA is studied. The fabricated TIA exhibits the regulated cascade (RGC) type at the input stage and is designed using the TSMC 0.35μm SiGe BiCMOS 3P3M process. The RGC stage isolates the input parasitic capacitance and makes bandwidth performance better. Measured results show the bandwidth of 2.78GHz and the gain of 58.47 dBΩ with 0.25pF input capacitance. The power consumption is 58.6mW for 3.3V supply.
In the third part, we added a varible gain amplifier and an automatic-gain-control circuit on the design above using TSMC 0.35μm SiGe BiCMOS 3P3M process. Measured results show the dynamic range of 2.5~180μA, the bandwidth of 1.8~2GHz and the gain of 65.7~83 dBΩ with 0.25pF input capacitance. The power consumption is 143.5mW for 3.3V supply.
Finally, we designed and simulated a clock and data recovery IC. A gate-controlled oscillator was employed. This design speeds up the lock time. Result indicates a transmission rate of 900Mbps.

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