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研究生: 葉懿婷
Yi-Ting Yeh
論文名稱: 低靜態電流之漣波控制自適應導通時間降壓轉換器
A Low Quiescent Current Ripple-Based Control Adaptive On-Time Buck Converter
指導教授: 彭盛裕
Sheng-Yu Peng
口試委員: 林景源
Jing-Yuan Lin
姚嘉瑜
Chia-Yu Yao
陳筱青
Hsiao-Chin Chen
彭盛裕
Sheng-Yu Peng
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2023
畢業學年度: 111
語文別: 英文
論文頁數: 78
中文關鍵詞: 降壓型電源轉換器直流轉換器低靜態電流降壓轉換器基於漣波控制自適應導通時間控制
外文關鍵詞: Buck Converter, DC/DC Converter, Low Quiescent Current Buck Converter, Ripple-Based Control, Adaptive On-Time Control
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  • 本篇論文提出一應用於物聯網絡(Internet of Things)之降壓轉換電路,近年來在低功耗設計之電源管理電路需求增加,本論文提出一在寬負載之應用條件下,降壓轉換器產生一穩定電壓提供能源於電子設備。以低功耗設計為核心概念,達到在輕負載之條件下,降低降壓轉換電路,藉此提升輕負載情況之效率,延長電池使用壽命。再者,與普遍常見之電壓控制模式(Voltage-Mode Control)、電流控制模式(Current-Mode Control)進行比較,為了簡化較複雜之補償器與防止系統有次諧波振盪(sub-harmonic oscillation)之不理想情況,控制電路架構以偵測輸出電壓漣波之方式,透過比較輸出之回授電壓與參考電壓之準位產生工作訊號以控制電路。並搭載自適應導通時間產生器,減少輸入、輸出電壓變動對電感電流之影響。且隨著負載變動,自適應導通時間產生器會去調節導通時間及輸出電壓以維持系統穩定性。降壓轉換電路加入零電流偵測機制以控制下橋開關,避免反向電感電流。最後,為降低降壓轉換電路之靜態電流,基於常見之漣波控制降壓轉換電路,此晶片加入邏輯電路設計以減少降壓轉換電路待機時之功耗,藉此提高效率。

    此論文提出之晶片採用台積電 0.18µm 高壓製程,其晶片面積約為1.69平方毫米。此晶片設計於非連續導通模式,當負載電流操作於100µA時,透過後模擬結果驗證系統效率為92.1%,當負載電流為無載之條件下,靜態電流約為592nA。


    This thesis proposes a buck converter circuit for Internet of Things applications. The demand for power management circuits with low-power designs has increased in recent years. The core concept of the low power consumption design is to alleviate the low-efficiency problem under ultra-light load conditions to extend the battery life or save energy. The ripple-based control architecture is adopted to reduce the circuit complexity without dealing with sub-harmonic oscillation problems, as in the standard voltage and current mode control. The control circuit compares the feedback output voltage with the reference voltage to generate signals to turn on or off the power switches. The buck converter incorporates an adaptive on-time generator to reduce the effect of input voltage variations on the inductor current. And as the load varies, the adaptive on-time generator will adjust the on-time and output voltage to maintain system stability. A zero-current detection mechanism is added to the buck converter to reduce the reverse inductor current. In order to reduce the static current of the buck converter circuit, the chip employs logic circuits to reduce the power consumption when both the high-side and low-side switches are turned off.

    The proposed chip is manufactured using the TSMC 0.18$µm BCD process with a die area of about 1.69mm^2. The chip is designed for discontinuous conduction mode, and post-simulation results verify the system efficiency to be 92.1% when the load current is operated at 100µA. Furthermore, the quiescent current is 592nA when the load condition is no load.

    Recommendation Letter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Approval Letter . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . ii Abstract in Chinese . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . iii Abstract in English . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xii 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Background Knowledge of DC-DC Converter . . . . . . . . . . . . . . . . . . 8 2.1 Classification of Voltage Regulators . . . . . . . . . . . . . . . . . . . . 8 2.1.1 Linear Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1.2 Switched Capacitor Converter . . . . . . . . . . . . . . . . . . . 9 2.1.3 Inductive Converter . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1.4 Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2 Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.2.1 Continuous Conduction Mode(CCM) . . . . . . . . . . . . . . . 15 2.2.2 Discontinuous Conduction Mode(DCM) . . . . . . . . . . . . . . 16 2.3 Modulation Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3.1 Pulse-Width Modulation . . . . . . . . . . . . . . . . . . . . . . 18 2.3.2 Pulse-Frequency Modulation . . . . . . . . . . . . . . . . . . . . 19 2.4 Switching Regulator Control Methods . . . . . . . . . . . . . . . . . . . 21 2.4.1 Voltage-Mode Control . . . . . . . . . . . . . . . . . . . . . . . 21 2.4.2 Current-Mode Control . . . . . . . . . . . . . . . . . . . . . . . 22 2.4.3 Ripple-based Control . . . . . . . . . . . . . . . . . . . . . . . . 24 3 Proposed Low Quiescent Current Ripple-based Adaptive On-Time Buck Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.1 System Architecture of Adaptive On-Time Buck Converter with the Proposed Control Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.1.1 Operation of Proposed RBAOT Buck Converter . . . . . . . . . 30 3.2 Analysis of Power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . 31 3.3 Analysis of Adaptive On-Time Generator . . . . . . . . . . . . . . . . . 35 4 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.1 Static Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.2 Adaptive On-Time Generator . . . . . . . . . . . . . . . . . . . . . . . . 40 4.3 Zero Current Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.3.1 Delay Chain of Zero Current Detection . . . . . . . . . . . . . . 44 4.4 Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 5 Simulation and Measurement Results . . . . . . . . . . . . . . . . . . . . . . . 48 5.1 Chip Micrograph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.2 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.3 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 5.5 Performance Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6 Conclusion and Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.2 Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

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