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研究生: 邱秉誠
Ping-Cheng Chiu
論文名稱: 有機薄膜電晶體元件製作及其性能與可靠度改善之研究
Fabrication of Organic Thin-Film Transistors and Performance and Reliability Improvement
指導教授: 范慶麟
Ching-Lin Fan
口試委員: 徐世祥
Shih-Hsiang Hsu
李志堅
Chih-Chien Lee
王錫九
Shea-Jue Wang
李文德
Win-Der Lee
彭冠臻
Du-Zen Peng
涂峻豪
Chun-Hao Tu
學位類別: 博士
Doctor
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2012
畢業學年度: 101
語文別: 英文
論文頁數: 144
中文關鍵詞: 有機薄膜電晶體五苯環可靠度低溫沉積閘極絕緣層表面修飾層載子注入層雙層保護膜
外文關鍵詞: organic thin-film transistor, pentacene, reliability, low-temperature-deposited gate insulator, surface modification layer, carrier injection layer, bilayer passivation
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本論文主要內容在於研究五苯環有機薄膜電晶體之元件製作以及其特性之分析,並利用所提出之新式改善技術來增進元件之性能與可靠度。首先,我們提出一簡易之低溫化學氣相沉積技術去製備具有疏水性的二氧化矽薄膜,並將其應用於元件之閘極絕緣層上。其研究結果顯示,以自組裝之電漿式中空陰極化學氣相沉積系統在一基板溫度低於攝氏一百度並使用四乙氧基矽烷作為前驅物所製備出來之二氧化矽薄膜中,會含有來自四乙氧基矽烷分子因低溫而導致不完全解離所殘留下的疏水性甲烷官能基。這些疏水性甲烷官能基使得二氧化矽薄膜表面呈現疏水性,因此有利於後續五苯環通道層之結晶成長,進而獲得較大之晶粒尺寸,使得所製元件之性能表現已經可以與其它使用高溫所製備之二氧化矽薄膜作為閘極絕緣層相媲美。
其次,我們提出以鐵氟龍薄膜作為表面修飾層,沉積在元件之源/汲極與閘極絕緣層上方來改善下接觸式元件結構之電氣特性。其研究結果顯示,藉由沉積一點五奈米厚度之鐵氟龍表面修飾層,可以改善五苯環通道層之分子配向以及五苯環通道層與源/汲極之間的載子注入效率,進而提升元件之電氣特性。這可以歸因於閘極絕緣層經由鐵氟龍薄膜修飾後,其表面特性可由原來的親水性轉變為疏水性,且並無大幅增加其表面粗糙度,因此有利於後續五苯環通道層之結晶成長;另外,鐵氟龍修飾層穿插於五苯環通道層與源/汲極之間,可使得載子能輕易地藉由穿隧效應進行傳輸,進而大幅提升有機半導體與金屬之間的載子注入效率。而元件經由使用一點五奈米厚度之鐵氟龍表面修飾層之後,其輸出電流與載子移動率的表現與未使用鐵氟龍表面修飾層之元件相比,分別被提升了百分之九十三與百分之一百零五。同時我們亦發現元件之性能表現會隨著鐵氟龍表面修飾層的厚度增加而呈現衰退現象,這可以歸因於鐵氟龍薄膜本身具有極高之電阻率,且其絕緣特性會隨著厚度增加而更加顯著,導致在有機半導體與金屬之間的接觸電阻亦隨之上升,使得載子注入效率大幅衰減,進而降低元件之性能表現。
再者,我們提出以鐵氟龍薄膜作為載子注入層,穿插於五苯環通道層與源/汲極之間來改善上接觸式元件結構之電氣特性。其研究結果顯示,元件經由使用一點五奈米厚度之鐵氟龍載子注入層之後,其輸出電流與載子移動率的表現與未使用鐵氟龍載子注入層之元件相比,分別被提升了百分之七十五與百分之八十一。這可以歸因於鐵氟龍載子注入層的引入大幅降低了有機半導體與金屬之間的載子注入能障,並使載子能輕易地藉由穿隧效應進行傳輸,進而大幅提升載子注入效率。而載子注入效率的提升亦反映在元件之有機半導體與金屬之間的接觸電阻上,進而提升元件之性能表現。
最後,我們提出以雙層保護方法使用鐵氟龍與二氧化矽薄膜組合層來改善元件在大氣環境操作下之穩定度。其研究結果顯示,元件經由使用雙層保護之後,其性能表現與未使用保護層之元件近乎相似,這可以歸因於以熱蒸鍍系統所製備之鐵氟龍薄膜成功地扮演了緩衝層的角色,其不僅未破壞到底下之有機半導體層,而且可以有效地保護元件免受於二氧化矽濺鍍製程中所產生之電漿破壞。同時我們亦發現以雙層保護之元件操作在相對溼度介於百分之六十至八十之大氣環境下,其穩定度及使用壽命與未使用保護層之元件相比,可被大幅提升及改善。這可以歸因於二氧化矽薄膜具有優良的阻水氣性能,進而有效地防止大氣環境中之水氣滲入。


In this dissertation, we focus on the fabrication and characterization of the pentacene-based organic thin-film transistors (OTFTs) and use the proposed schemes to enhance the devices’ electrical performance and reliability. First, we present a simple deposition method to fabricate hydrophobic silicon dioxide (SiO2) as a gate insulator for pentacene-based OTFTs. The SiO2 gate insulator, which was deposited at 80°C by hollow-cathode chemical vapor deposition (HC-CVD) using a tetraethoxysilane (TEOS) precursor gas, contained hydrophobic methyl (CH3) functional groups due to incompletely dissociated TEOS molecules. These CH3 functional groups made the SiO2 surface more hydrophobic and, thus, facilitated crystalline growth of the pentacene film, resulting in device performance that could be comparable to OTFTs with SiO2-based gate insulators deposited at higher temperatures.
Second, we investigate the effect of polytetrafluoroethylene (Teflon) as a surface modification layer, which was deposited on the surface of gate insulator and source/drain (S/D) electrodes, on bottom-contact pentacene-based OTFTs. The inserted 1.5-nm-thick Teflon layer can enhance the device performance because of the improved molecular orientation in pentacene channel layer and reduced contact resistance (RC) between the pentacene channel layer and the S/D electrodes. The improved molecular orientation of pentacene channel layer is caused by the hydrophobic and smooth Teflon layer surface. The reduced RC is a result of the tunneling process at the Au/pentacene interface. This study also found that the device performance decreased as the Teflon layer increased in thickness. This is because of the increased RC and decreased carrier injection efficiency between the pentacene channel layer and the S/D electrodes. Compared to devices without a Teflon layer, the drain current (IDS) and field-effect mobility (μFE) of the devices with a 1.5-nm-thick Teflon layer can be increased by 93 and 105%, respectively.
Third, we demonstrate top-contact pentacene-based OTFTs fabricated by inserting a Teflon carrier injection layer between the pentacene channel layer and S/D electrodes. Compared to devices without a Teflon layer, the inserted 1.5-nm-thick Teflon layer can enhance the IDS and μFE by 75 and 81%, respectively. The improvements are attributed to the reduction of hole injection barrier and tunneling process at the Au/pentacene interface, which can be confirmed by the reduced contact resistance measured at linear region.
Finally, we present a bilayer passivation method using a Teflon and SiO2 combination layer to enhance the environmental reliability of pentacene-based OTFTs. The Teflon was deposited as a buffer layer using a thermal evaporator that exhibited good compatibility with the underlying pentacene layer, and can effectively protect the OTFTs from plasma damage during the SiO2 passivation process, resulting in a negligible initial performance drop in OTFTs. Furthermore, because of the excellent moisture barrier ability of SiO2, the OTFTs exhibited good time-dependent electrical performance, even after 168 h of aging in ambient air with 60%–80% relative humidity.

Abstract (in Chinese) I Abstract (in English) IV Acknowledgements VI Contents VIII List of Tables XI List of Figures XII Chapter 1 Introduction 1.1 Overview of Organic Thin-Film Transistors 1 1.2 Organic Semiconductor Materials 2 1.2.1 Polymers 3 1.2.2 Small Molecules 3 1.2.3 n-Type Organic Semiconductors 4 1.3 Charge Transport in Organic Semiconductors 5 1.4 Device Structures of Organic Thin-Film Transistors 7 1.5 Operation of Organic Thin-Film Transistors 8 1.6 Motivation 9 1.7 Dissertation Organization 11 Chapter 2 Device Fabrication Details 2.1 Material Selection 24 2.1.1 Substrate and Gate Electrode 24 2.1.2 Gate Insulator 25 2.1.3 Source and Drain Electrodes 25 2.1.4 Channel Layer 26 2.1.5 Passivation Layer 26 2.2 Fabrication Processes 27 2.3 Measurements and Characterizations 28 2.3.1 Electrical Measurements 28 2.3.2 Electrical Characterizations 28 2.3.2.1 Field-Effect Mobility 28 2.3.2.2 Threshold Voltage 30 2.3.2.3 Subthreshold Swing 31 2.3.2.4 ON/OFF Current Ratio 31 2.3.2.5 Contact Resistance 32 2.3.3 Material Characterizations 33 Chapter 3 Fabrication and Characterization of Pentacene-Based Organic Thin-Film Transistors with a Low-Temperature (80°C) Hollow-Cathode CVD SiO2 as the Gate Insulator 3.1 Introduction 48 3.2 Experiments 49 3.3 Results and Discussion 51 3.3.1 Characterization of HC-CVD SiO2 Films 51 3.3.2 Characterization of OTFTs with 80°C HC-CVD SiO2 as the gate insulator 52 3.4 Summary 55 Chapter 4 Effect of Inserting Teflon as a Surface Modification Layer on Bottom-Contact Pentacene-Based Organic Thin-Film Transistors 4.1 Introduction 68 4.2 Experiments 70 4.3 Results and Discussion 71 4.4 Summary 74 Chapter 5 Performance Improvement of Top-Contact Pentacene-Based Organic Thin-Film Transistors by Inserting an Ultrathin Teflon Carrier Injection Layer 5.1 Introduction 93 5.2 Experiments 94 5.3 Results and Discussion 95 5.4 Summary 97 Chapter 6 Teflon/SiO2 Bilayer Passivation for Improving the Electrical Reliability of Pentacene-Based Organic Thin-Film Transistors 6.1 Introduction 110 6.2 Experiments 112 6.3 Results and Discussion 112 6.4 Summary 114 Chapter 7 Conclusions and Suggestions for Future Works 7.1 Conclusions 124 7.2 Suggestions for Future Works 126 References 127 Vita 142 Publication List 143

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