研究生: |
賴威志 Wei-Chih Lai |
---|---|
論文名稱: |
超寬鎖頻範圍之除五注入鎖定除頻器與寬鎖頻範圍之除四注入鎖定除頻器之設計 Design of An Ultra Wide-Band Divide-by-5 Injection-Locked Frequency Divider and A Wide-Band Divide-by-4 Injection-Locked Frequency Divider Using Resonator |
指導教授: |
張勝良
Sheng-Lyang Jang 莊敏宏 Miin-Horng Juang |
口試委員: |
徐世祥
Shih-Hsiang Hsu 徐敬文 Ching-Wen Hsue |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2015 |
畢業學年度: | 103 |
語文別: | 英文 |
論文頁數: | 92 |
中文關鍵詞: | 壓控震盪器 、注入鎖定除頻器 |
外文關鍵詞: | VCO, ILFD |
相關次數: | 點閱:238 下載:5 |
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本論文提出三個電路,第一個電路先描述一個超寬鎖頻範圍除五注入鎖定除頻器,是使用 TSMC 0.18 μm CMOS製程。此注入鎖定除頻器是使用雙諧振RLC共振腔以及線性混波器來擴展鎖頻範圍。量測結果為供應電壓1.15 V,而高頻和低頻是藉由偏壓改變可變電容容值,造成頻率改變分別在3.10和2.81 GHz,核心功耗為8.38 mW。注入訊號為0 dBm時,其除五鎖頻範圍為11.4至15.8 GHz (32.35%)。
第二個電路描述一個除五寬鎖頻範圍單端注入鎖定除頻器,此電路是使用TSMC 0.18 μm CMOS製程所實現,量測結果為供應電壓1.15 V,而可調範圍則是使用電壓來改變可變電容,達到頻率可調的機制。可調範圍由2.81 GHz至3.10 GHz,當注入訊號功率為0 dBm時,其總鎖頻範圍為12.8 GHz至15.6 GHz (19.7%),總功耗為8.38 mW。
最後一個電路是描述一個除四寬鎖頻範圍注入鎖定除頻器,是使用TSMC 0.18 μm CMOS製程。此注入鎖定除頻器是使用雙諧振RLC共振腔以及線性混波器來擴展鎖頻範圍。量測結果為供應電壓1.4 V,核心功耗為11.872 mW。可調範圍則是使用電壓來改變可變電容,達到頻率可調的機制,可調範圍由2.69 GHz至2.87 GHz。注入訊號為0 dBm時,其除四鎖頻範圍為9.5至12.7 GHz (28.82%)。
Firstly, this thesis presents an ultra wide locking range divide-by-5 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process . The ILFD circuit is realized with a cross-coupled n-core MOS dual-resonance RLC-tank oscillator with linear mixer to extend the locking range. The core power consumption of the ILFD core is 8.38 mW. The divider’s free-running frequency has dual-bands at 3.10 and 2.81 GHz by switching the varactor’s control bias, At the incident power of 0 dBm, the locking range is 4.4 GHz (32.35%), for the incident frequency extending from 11.4 to 15.8 GHz.
The second circuit is a wide locking range divide-by-5 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process . The ILFD circuit is realized with a capacitive cross-coupled n-core MOS dual-resonance RLC-tank oscillator with linear mixer to extend the locking range. The core power consumption of the ILFD core is 8.38 mW. The ILFD uses a single injection MOSFET. At the incident power of 0 dBm, the locking range is 2.8 GHz (19.7%) for the incident frequency extending from 12.8 to 15.6 GHz.
Finally, an ultra wide locking range divide-by-4 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ILFD circuit is realized with a cross-coupled n-core MOS dual-resonance RLC-tank oscillator with linear mixer to extend the locking range. The core power consumption of the ILFD core is 11.872 mW. The divider’s free-running frequency has dual-bands at 2.87 and 2.69 GHz by switching the varactor’s control bias, At the incident power of 0 dBm the locking range is 3.2 GHz (28.82%), for the incident frequency extending from 9.5 to 12.7GHz.
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