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研究生: 林緯德
Wei-Te Lin
論文名稱: 使用表格分割技術之低功率JPEG Huffman解碼器設計
Design of A Low Power Huffman Decoder for JPEG Using Lookup Table Bipartition Technique
指導教授: 阮聖彰
Shanq-Jang Ruan
口試委員: 梁文耀
Wen-Yew Liang
楊佳玲
Chia-Lin Yang
郭景明
Jing-Ming Guo
許孟超
Mon-Chau Shie
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2007
畢業學年度: 95
語文別: 英文
論文頁數: 41
中文關鍵詞: 霍夫曼解碼低功率二分割
外文關鍵詞: Huffman, Decoding, Bipartitiion
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  • JPEG(Joint Photographic Experts Group)影像編碼與解碼在現今是一種最常應用於通訊及儲存上的技術。之前在不定長度解碼器上之研究都是在提高解碼的效能,幾乎沒有降低消耗功率方面的研究,但是在可攜式產品(例如:PDA, 筆記型電腦, 手機),因為這些裝置都是利用電池供電的,所以降低消耗功率對可攜式裝置是很重要的議題。
    在這篇論文中我們利用並列不定長度解碼器及二分割架構來設計低功率JPEG Huffman解碼器。因為所使用的Huffman碼是傳統JPEG影像編碼與解碼的Huffman碼,所以在編碼端是不需要做任何改變的。在實驗方面,我們使用台積電0.13μm製程,功率量測則是使用Synopsys PrimePower。實驗結果顯示我們所提出的JPEG Huffman解碼器架構跟傳統的解碼器相比,所提出的解碼器減少了22.6%的平均功率消耗而且解碼器所需的面積亦比傳統還小。


    JPEG image codec is one of the most commonly used standards for communication and storage applications. Previous work related to variable length decoders is primarily aimed at high throughput applications, but the increased demand for portable device has made power a very important factor. In this paper, a new approach to implement JPEG Huffman decoder is presented, which exploits the statistics of Huffman codewords to reduce power. Our approach uses bipartition architecture to split Huffman table into two partitions based on codeword frequency. Experimental results of the gate level simulation using Synopsys
    PrimePower show that the proposed method can reduce the power consumption by 22.6% on average and less area compared to general Huffman decoder.

    Table of Contents iv List of Tables v List of Figures vi Abstract vii 1 Introduction 1 2 Background 3 2.1 Source of Power Dissipation . . . . . . . . . . . . . . . . .3 2.2 Parallel VLC Decoding . . . . . . . . . . . . . . . . . . . 4 2.3 Low Power Bipartition Architecture . . . . . . . . . . . . . 6 3 Proposed Approach 8 4 Implementation of JPEG Huffman decoder 19 4.1 VLC detector block . . . . . . . . . . . . . . . . . . . . . 19 4.2 Bipartition decoding block . . . . . . . . . . . . . . . . . 21 4.3 Symbol output block . . . . . . . . . . . . . . . . . . . . 22 5 Experiments 23 5.1 Experimental setup . . . . . . . . . . . . . . . . . . . . . 23 5.2 Experimental result . . . . . . . . . . . . . . . . . . . .. 23 6 Conclusion 28 Bibliography 29

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