NAND型快閃記憶體容量迅速的增加，大容量的固態硬碟在市場上已經變成非常的流行。固態硬碟主要是由很多的NAND型快閃記憶體和控制器所組成，每一個快閃記憶體晶片必須由一個控制器來做控制。在目前的設計，每一個控制器負責固定數量的NAND型快閃記憶體晶片，它不能控制其它不屬於它的晶片。由於每一個控制器一次只能存取一個晶片，一些閒置的控制器不能存取一些不屬於它的晶片。因此，它將會降低系統的性能。在這篇論文裡，我們將提出一個針對大容量固態硬碟的多控制器架構設計，任何的晶片將不侷限於任何特定的控制器，每一個閒置的控制器能透過多控制器架構的設計去存取任何的晶片。我們在匯流排之間設計一個交換器，每一個交換器能幫助請求從一個控制器存取到一個晶片，每個存取請求所使用到交換器應該使用最少的數量。實驗結果證明我們提出的方法比傳統的固態硬碟還要好25%以上的吞吐量，所帶來的開銷也在合理的範圍內。

NAND flash-memory capacity has increased rapidly, and a huge-capacity solid-state drive (SSD) has become popular in the market. SSD consists of controllers and NAND flash-memory chips, and each chip is controlled by one controller. At present, each controller is responsible for a fixed number of chips and it can't control other chips that don't belong to it. Since each controller can only access a chip at a time, some idle controller can't access some chips that don't belong to it. As a result, it will reduce the system performance. In this paper, we will propose a multi-controller design for huge-capacity solid-state drives. Any chip will not be restricted to any specific controller and any idle controller can access any chip by the multi-controller design. We design a switch between buses, and each switch can help access requests from one controller to one chip. The number of switches used in each access request should be minimized and considered in the paper. The experimental results show that the proposed method can improve the system throughput of 25%, compared with traditional SSDs, and the incurred overhead is also reasonable.

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