研究生: |
楊仁翔 Ren-Xiang Yang |
---|---|
論文名稱: |
除二注入鎖定除頻器及多路徑八字型電感振盪器 Divide-by-2 injection-locked frequency divider and Multi-path 8-shaped inductance oscillator |
指導教授: |
張勝良
Sheng-Lyang Jang |
口試委員: |
張勝良
Sheng-Lyang Jang 莊敏宏 Miin-Horng Juang 陳省隆 Hsing-Lung Chen 徐世祥 Shih-Hsiang Hsu |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2021 |
畢業學年度: | 109 |
語文別: | 英文 |
論文頁數: | 101 |
中文關鍵詞: | 注入鎖定除頻器 、振盪器 |
外文關鍵詞: | injection-locked frequency, oscillator |
相關次數: | 點閱:138 下載:8 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
射頻積體電路(RFIC)中,Phase-Locked Loop的特性格外重要,PLL 內部包含了充電幫浦(Phase-locked loop)、壓控振盪器(Voltage Control Oscillator)、相位偵測器(Phase Frequency Detector)、迴路濾波器(Loop Filter)、除頻器(Frequency Divider)而為了追求低功率損耗,低相位雜訊,與較寬的除頻範圍,這其中又以壓控振盪器和注入鎖定除頻器特性最重要,而此論文主要研究鎖相迴路中的注入鎖定除頻器及壓控震盪器的設計量測。
首先,透過設計一個扭曲電感的寬頻除二注入鎖定除頻器,此電路採用的是台積電的0.18 μm BICMOS,與使用八字形變壓器的其他 ILFD 相比,使用雙絞耦合感應線圈的 ILFD 具有較低的電磁 (EM) 輻射以及較小的 EM 雜訊接收敏感度。8字形變壓器和寄生電容形成一個雙諧振腔,這使得具有雙頻段鎖定範圍的ILFD能夠模擬較寬的鎖定範圍。功耗為14.25 mW 時,注入功率為 0 dBm 時的鎖定範圍為 3.6 GHz 至 10.6 GHz,品質因數 (FOM) 為 6.87。
其次,透過設計新的 8 字型變壓器,帶有一個兩路初級和一個兩路次級電感器,此電路採用的是台積電的0.18μm COMS,,VCO 晶片的面積為 0.546 ×0.937 〖mm〗^2。我們使用新的 8 字型同心變壓器製造了用於低壓操作的 LC 型 NMOS 壓控振盪器 (VCO),變壓器使用兩個一匝線圈串聯,在 0.62 V 電源和 3.42mW 功耗下,在 1 MHz 偏移頻率下,測得的 VCO 在 5.9 GHz 的Phase Noise為 -115.11 dBc/Hz,VCO 品質因數為 -185.18 dBc/Hz。
最後,設計了一個使用 8 字型三線變壓器的 LC 型 CMOS NP 交叉耦合壓控振盪器 (VCO)。 此電路採用的是台積電的0.18μm CMOS製程,VCO的面積為0.762×0.855 〖mm〗^2,VCO 使用一個 8 字型三線變壓器,用於提升 P-FET 和 N-FET 電壓擺幅以實現低功耗。三線變壓器使用兩個串聯的3匝線圈作為初級,佈局方法減少了交叉金屬線和寄生電容的數量。一圈8字型次級與初級交錯以獲得高耦合係數,3:1:1變壓器使變壓器對稱佈局,8字形變壓器的兩個波瓣輻射遠場磁場,抑制磁場輻射。在 0.9 V 電源和 2.78mW 功耗下,測得的 VCO 在 2.78 GHz 的Phase Noise為 -123.1 dBc/Hz,VCO 品質因數為 -192.36 dBc/Hz。
In the radio frequency integrated circuit (RFIC), the characteristics of the Phase-Locked Loop are particularly important. The PLL (Phase-locked loop) includes a charging pump, a voltage-controlled oscillator (Voltage Control Oscillator), and a loop filter (Loop Filter), phase detector (Phase Frequency Detector), frequency divider (Frequency Divider) and in order to pursue low phase noise, low power loss, and a wider frequency division range, among them, voltage-controlled oscillator and injection-locked frequency division are used. The characteristics of the device are the most important. This article mainly studies the design and measurement of the injection-locked frequency divider and the voltage-controlled oscillator in the phase-locked loop.
First of all, by designing a wide-frequency divide-by-two injection-locked divider with twisted inductor, this circuit uses TSMC’s 0.18 μm BICMOS. Compared with other ILFDs, ILFDs that use twisted-pair coupled induction coils have lower electromagnetic (EM) radiation and less EM noise reception sensitivity. The figure-of-eight transformer and parasitic capacitance form a dual resonant cavity, which enables the ILFD with dual-band lock-in range to simulate a wider lock-in range. When the power consumption is 14.25 mW, the lock range when the injected power is 0 dBm is from 3.6 GHz to 10.6 GHz, and the figure of merit (FOM) is 6.87.
Secondly, by designing a new figure-eight transformer with a two-way primary and a two-way secondary inductor, this circuit uses TSMC’s 0.18 μm COMS, and the area of the VCO chip is 0.546 × 0.937 〖mm〗^2. We use a new figure-eight concentric transformer to manufacture an LC-type NMOS voltage-controlled oscillator (VCO) for low-voltage operation. The transformer uses two one-turn coils in series and operates at 1 MHz under 0.62 V power supply and 3.42 mW power consumption. At the offset frequency, the measured Phase Noise of the VCO at 5.9 GHz is -115.11 dBc/Hz, and the VCO quality factor is -181.58 dBc/Hz.
Finally, an LC-type CMOS NP cross-coupled voltage-controlled oscillator (VCO) using a figure-of-eight three-wire transformer is designed. This circuit uses TSMC’s 0.18μm CMOS process. The area of the VCO is 0.762×0.855 〖mm〗^2. The VCO uses a figure-eight three-wire transformer to increase the voltage swing of P-FET and N-FET to achieve low power consumption. The three-wire transformer uses two series-connected 3-turn coils as the primary, and the layout method reduces the number of crossed metal wires and parasitic capacitance. A circle of figure-eight secondary and primary are interleaved to obtain a high coupling coefficient. The 3:1:1 transformer makes the layout of the transformer symmetrical. The two lobes of the figure-eight transformer radiate the far-field magnetic field and suppress the magnetic field radiation. Under 0.9 V power supply and 2.78 mW power consumption, the measured Phase Noise of the VCO at 2.78 GHz is -123.1 dBc/Hz, and the VCO quality factor is -192.36 dBc/Hz.
[1] B. Razavi, “RF Microelectronics”, Upper Saddle River, NJ: Prentice Hall, 1998.
[2] N. M. Nguyen and R. G. Meyer, “Start-up and frequency stability in high-frequency oscillators,” IEEE J. Solid-State Circuit, vol. 27, no. 5, pp. 810–820, May 1992.
[3] S. Smith, Microelectronic Circuit 4th edition, Oxford University Press 1998.
[4] B. Razavi, Design of Analog CMOS Integrated Crcuits, MC Graw Hall,2001.
[5] T. H. Lee, The design of CMOS radio frequency integrated circuits, Cambridge University Press, 1998.
[6] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors”, IEEE Transactions on Parts, Hybrids, and Packaging, vol. 10, pp. 101-109, Jun 1974.
[7] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE J. Solid- State Circuits, vol. 35, pp. 1368-1382, Sept. 2000.
[8] A. Zolfaghari, A. Chan, and B. Razavi, “Stacked inductors and transformers in CMOS technology,” IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, Apr. 2001.
[9] P. Andreani, S. Mattisson, “On the use of MOS varactors in RF VCOs,” IEEE Journal of Solid-State Circuits, vol. 35, no. 6, pp. 905-910, June 2000.
[10] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179−194, Feb. 1998.
[11] S.-L. Jang, R.-K. Yang, C.-W. Chang, M.-H. Juang, and C.-C. Liu, ” Dual-band transformer-coupled quadrature injection-Locked frequency dividers,” Microw. Opt. Technol. Lett., pp.1561-1564, July, 2011.
[12] C.-W. Chang, S.-L. Jang, C.-W. Huang, and C.-C. Shin, “Dual resonance LC-tank frequency divider implemented with switched varactor bias,” in Proc. IEEE Int. Symp. VLSI Design, Autom. Test, Apr. 2011, pp. 1–4.
[13] D. Hauspie, E.-C. Park, and J. Craninckx, “Wide-band VCO with simultaneous switching of frequency band, active core, and varactor size,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1472–1480, Jul. 2007.
[14] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by128/ 129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp.890-897, July 1996.
[15] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by128/ 129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July 1996.
[16] Q. Huang and R. Rogenmoser, “Speed optimization of edge-triggered CMOS circuits for gigahertz single-phase clocks,” IEEE J. Solid-State Circuits, vol. 31, pp. 456-463, Mar. 1996.
[17] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, pp. 594-601, Apr. 2004.
[18] H. R. Rategh, and T.H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June 1999.
[19] H. D. Wohlmuth and D. Kehrer, “A high sensitivity static 2:1 frequency divider up to 27 GHz in 120 nm CMOS,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 823-826, Sept. 2002.
[20] M. Tiebout, “A 480 uW 2 GHz ultra low power dual-modulus prescaler in 0.25 um standard CMOS,” IEEE International Symposium on Circuit and System (ISCAS), vol. 5, pp. 741-744, May 2000.
[21] H. Wu, and A. Hajimiri, “A 19 GHz 0.5 mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” IEEE ISSCC Dig. Tech. Papers, pp. 412-413, Feb. 2001.
[22] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1 GHz and 2.8 GHz CMOS injection- locked ring oscillator prescalers,” IEEE Symposium on VLSI Circuits, pp. 47-50, June 2001.
[23] P. Kinget, R. Melville, D. Long, and V. Gopinathan, “An injection locking scheme for precision quadrature generation,” IEEE J. Solid-State Circuits, vol. 37, pp. 845-851, July 2002.
[24] H. Wu, “Signal generation and processing in high-frequency/high-speed siliconbased integrated circuits,” PhD thesis, California Institute of Technology, 2003.
[25] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp.1380-1385, Oct. 1973.
[26] Y.-H. Chuang, S.-H. Lee, R.-H. Yen, S.-L. Jang, J.-F. Lee and M.-H. Juang, “A wide locking range and low voltage CMOS direct injection-locked frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 299-301, May 2006.
[27] S.-L. Jang, W.-C. Cheng and C.-W. Hsue, "Wide-locking range divide-by-3 Iniection-locked frequency divider using 6th-order RLC resonator," IEEE Trans. VLSI Syst., vol. 24, no. 7, pp.2598-2602, 2016.
[28] H.-C. Lee, S.–L. Jang, H.‐C. Lee, H.‐W. Liu, and L. Y. Chen,” Divide-by-2 injection-locked frequency divider exploiting an 8-shaped inductor,” Microw Opt Technol Lett. 1–5, 2020.
[29] H. -C. Lee, S. -L. Jang, Y. -H. Fan, F. -S. Chou, Y. -S. Liao and M. -H. Juang, "Divide-by-2 Injection-locked frequency dividers with twisted inductors," 2020 Int. Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM), Makung, Penghu, Taiwan, 2020, pp. 1-5.
[30] S. Jang, J. C. Hou, W. -C. Lai and M. -H. Juang, "Divide-by-2 transformer-based injection-locked frequency dividers with two active cores," 2019 IEEE 4th Int. Confe. on Integrated Circuits and Microsystems (ICICM), Beijing, China, 2019, pp. 182-185.
[31] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1170–1174, Jul. 2004.
[32] S. Lee, S. Jang, and C. Nguyen, “Low-power-consumption wide-locking-range dual-injection-locked 1/2 divider through simultaneous optimization of VCO
[33] N. Mahalingam, K. Ma, K. S. Yeo, and W. M. Lim, “Coupled dual LC tanks based ILFD with low injection power and compact size,” IEEE Microw. Wireless Compon. Lett., vol. 24, no. 2, pp. 105-107, Feb 2014.
[34] S.-L. Jang, F.-B. Lin, and J.-F. Huang, ” Wide-band divide-by-2 injection-locked frequency divider using MOSFET mixers DC-biased in subthreshold region,”Int. J. Circ Theor App, 43, 2081-2088, 2015.
[35] H. Wu and A. Hajimiri, “A 19 GHz 0.5mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” in IEEE Int. Solid-State Circuits Conf., pp. 412-413, Feb. 2001.
[36] S.-L.Jang, L.-Y. Huang, C.-W. Hsue, and J.-F. Huang," Injection-locked frequency divider using injection mixer DC-biased in sub-threshold," IEEE Microw. Wireless Compon. Lett., vol. 25, no. 3, pp. 193-195, March 2015.
[37] S.-L. Jang, S.-S. Huang, J.-F. Lee and M.-H. Juang,” LC-tank Colpitts injectionlocked frequency divider with record locking range,” IEEE Microw. Wireless Compon. Lett., pp.560-562, Aug. 2008.
[38] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813–821, June 1999.
[39] K. Kwok and H. C. Luong, “Ultra-low-voltage high-performance CMOS VCOs using transformer feedback,” IEEE J. Solid-State Circuits, vol. 40, no. 3, pp. 652–660, Mar. 2005.
[40] S. Jang and C.-F. Lee, “A low voltage and power LC VCO implemented with dynamic threshold voltage MOSFETs,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 5, pp. 376–378, 2007.
[41] J. Yang, C.-Y. Kim, D.-W. Kim and S. Hong, “Design of a 24-GHz CMOS VCO with an asymmetric-width transformer,” IEEE Trans. Circuits and Systems—II: Express Briefs, Vol. 57, No. 3, 2010, pp. 173-177.
[42] J. H. Song, B. S. Kim, and S. Nam, “A 13 GHz 3:2 transformer based linear transconductance VCO,” in Proc. IEEE Int. SoC Design Conf. (ISOCC), Nov. 2015, pp. 233–234.
[43] Y.-H. Chuang, S.-L. Jang, S.-H. Lee, R.-H. Yen, and J.-J. Jhao, “5-GHz low power current-reused balanced CMOS differential Armstrong VCOs,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 2, pp. 139–141, Feb. 2007.
[44] T. Nguyen and J.-W. Lee, “Ultralow-power ku-band dual-feedback armstrong VCO with a wide tuning range,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 59, no. 7, pp. 394–398, Jul. 2012.
[45] W. Lai, S. Jang and Y. Huang, "Implementation of multipath transformer in CMOS voltage-controlled oscillator using multi-path transformer," 2018 IEEE 3rd Int. Conf. Integrated Circuits and Microsystems (ICICM), Shanghai, 2018, pp. 188-191.
[46] S.–L. Jang, J. C. Hou, B.-S. Shih and G.-Z. Li,” Low-phase noise 8.22 GHz GaN HEMT oscillator using a feedback multi-path transformer,” Microw. Opt. Technol. Lett. Feb., 2019.
[47] W. Zou, D. Chen, W. Peng and Y. Zeng, “Experimental investigation of multi‐path and metal‐stacking structure for 8‐shape on‐chip inductors on standard CMOS,” Electron. Lett., vol. 52, no. 24, pp. 1998–1999, 2016.
[48] N. M. Neihart, D. J. Allstot, M. Miller and P. Rakers, "Twisted transformers for low coupling RF and mixed signal applications," IEEE Int. Symp. Circuits and Systems, Taipei, 2009, pp. 429-432.
[49] P. Wang et al., "A low phase-noise class-C VCO using novel 8-shaped transformer," 2015 IEEE Int. Symp. Circuits and Systems (ISCAS), Lisbon, 2015, pp. 886-889.
[50] P. Wang, G. Su, Y. Chang, D. Chang and S. S. H. Hsu, "A low phase noise quadrature phase oscillator with frequency pulling suppression technique," 2017 IEEE MTT-S Int. Microwave Symposium (IMS), Honololu, HI, 2017, pp. 1145-1147.
[51] V. Issakov, A. Werthof, J. Rimmelspacher, R. Weigel and A. Geiselbrechtinger, "Experimental study on crosstalk reduction between integrated inductors up to millimeter-wave regime," 2018 91st ARFTG Microwave Measurement Conference (ARFTG), Philadelphia, PA, 2018, pp. 1-4.
[52] N. J. Oh, and S. G. Lee, “11-GHz CMOS differential VCO with back-gate transformer feedback,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 733–735, Dec. 2005
[53] C. Meng, J.-S. Syu, S.-C. Tseng, Y.-W. Chang and G.-W. Huang, "Low-phase-noise SiGe HBT VCOs using trifilar-transformer feedback," 2008 IEEE MTT-S International Microwave Symposium Digest, 2008, pp. 249-252, doi: 10.1109/MWSYM.2008.4633150.
[54] Jin-Siang Syu, Chinchun Meng, Guo-Wei Huang, "SiGe HBT quadrature VCO utilizing trifilar transformers", Solid-State Circuits Conference 2008. A-SSCC '08. IEEE Asian, pp. 465-468, 2008.
[55] K.-W. Cheng and Y.-R. Tseng, “5 GHz CMOS quadrature VCO using trifilar-transformer-coupling technology,” IEEE Microw. Wireless Compon. Lett., vol. 26, no. 9, pp. 717–719, Sep. 2016.
[56] W. Zou, X. Zou, D. Ren, K. Zhang, D. Liu, and Z. Ren, “2.49-4.91 GHz wideband VCO with optimised 8-shaped inductor,” Electron. Lett., vol. 55, no. 1, pp. 55–57, Jan. 2019.
[57] N. M. Neihart, D. J. Allstot, M. Miller and P. Rakers, "Twisted transformers for low coupling RF and mixed signal applications," 2009 IEEE International Symposium on Circuits and Systems, Taipei, 2009, pp. 429-432, doi: 10.1109/ISCAS.2009.5117777.
[58] P. Wang et al., "A low phase-noise class-C VCO using novel 8-shaped transformer," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 2015, pp. 886-889, doi: 10.1109/ISCAS.2015.7168776.
[59] J. Yang, C.-Y. Kim, D.-W. Kim and S. Hong, “Design of a 24-GHz CMOS VCO with an asymmetric-width transformer,” IEEE Trans. Circuits and Systems—II: Express Briefs, Vol. 57, No. 3, 2010, pp. 173-177.
[60] N. J. Oh, and S. G. Lee, “11-GHz CMOS differential VCO with back-gate transformer feedback,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 11, pp. 733–735, Dec. 2005