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研究生: 陳俊霖
Jyun-Lin Chen
論文名稱: 馬赫曾德爾光調變器等效電路設計與具富陷阱層矽基板的特性探討
Equivalent Circuit Design for Mach-Zehnder Optical Modulators and Investigation on the Silicon Substrate with Trap-Rich Layer
指導教授: 李三良
San-Liang Lee
口試委員: 陳亮欽
Liang-Chin Chen
李仰淳
Yang-Chun Lee
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2023
畢業學年度: 111
語文別: 中文
論文頁數: 93
中文關鍵詞: 馬赫曾德爾光調變器富陷阱層小訊號等效電路
外文關鍵詞: Mach-Zehnder optical modulators, trap-rich layer, small signal equivalent circuit
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  • 本論文研發目標為探討及模擬單通道傳輸速度達100 Gbit/s且頻寬須達到35 GHz的矽光調變器架構。首先,我們對先前設計的高速連接軟板進行調整,接著建立馬赫-曾德爾矽光調變器之架構,通過將結構參數代入公式並使用軟體來設計小訊號電路模型,並從中進行調整優化,包括訊號電極寬度以及接地電極與訊號電極之間距,以實現最佳頻寬。
    我們引入了富陷阱層的概念來降低寄生表面傳導效應,從而提升基板性能並增加頻寬。同時也探討了引入富陷阱層的其他特性,並進行了模擬,包括平板串擾、諧波失真以及對電感器的影響。除了富陷阱層外,我們還嘗試將電感串聯至負載端前,透過模擬找出合適的電感值及電感尺寸參數,使得調變器能藉由電感效應讓頻寬提升。
    最後我們利用曲線擬和的方法,設計出馬赫-曾德爾矽光調變器大訊號電路模型,通過眼圖觀察電壓操作在非線性區域及線性區域的差異。在佈局的部分,我們對原標準元件之馬赫-曾德爾矽光調變器進行了修正,以通過設計規則檢查,並嘗試加入串聯電感至負載端前的設計,以利未來進行量測驗證。此論文建立的等效電路與分析方法可作為優化矽光調變器模型和含富陷阱層基板的有效工具,並可指出強化元件與性能的方向。


    The objective of this thesis is to investigate and simulate a silicon optical modulator architecture capable of achieving a transmission speed of 100 Gbit/s per channel with a bandwidth of 35 GHz. Firstly, adjustments were made to the previously designed high-speed connection circuit boards to enhance its bandwidth. The structure parameters were then incorporated into formulas to establish the Mach-Zehnder silicon optical modulator (MZM), and simulation software was employed to design a small-signal circuit model. The model was further optimized by adjusting device parameters, such as the signal electrode width and the spacing between the ground electrode and the signal electrode, to achieve the optimal bandwidth.
    The concept of introducing a trap-rich (TR) layer was introduced to reduce parasitic surface conduction effects, thereby enhancing the substrate performance and increasing the bandwidth. The introduction of the TR silicon layer was also explored by simulations for its other characteristics, including pad crosstalk, harmonic distortion, and the impact on inductors. In addition to TR layer, attempts were made to incorporate inductors in series before the load to enhance the modulator's bandwidth. The inductance values and dimensions can also be determined through simulations.
    Finally, a large-signal circuit model for the MZM was designed using curve fitting methods, and voltage operations in the nonlinear and linear regions were observed through eye diagrams. Layout modifications were made to the original standard component of the MZM to meet the design rule check. Additionally, a design incorporating series inductors before the load was implemented for future validation measurements. The established equivalent circuit and analysis methods in this thesis serve as effective tools for optimizing the silicon optical modulator and substrate with a TR layer, as well as providing guidance for enhancing component performance.

    目錄 摘要 I Abstract II 致謝 IV 目錄 VI 圖目錄 IX 表目錄 XIV 第 1 章 導論 1 1.1 前言 1 1.2 研究動機 2 1.3 文獻探討 4 1.4 論文架構 8 第 2 章 傳輸線基板 10 2.1 前言 10 2.2 傳輸線介紹 10 2.2.1 共平面波導(CPW) 10 2.2.2 共地共平面波導(CB-CPW) 11 2.3 電磁模擬軟體設定 13 2.3.1 求解模式比較 13 2.3.2 激發端口比較 14 2.4 高速連接軟板模擬設計 17 第 3 章 馬赫-曾德爾調變器原理及設計 23 3.1 前言 23 3.2 馬赫-曾德爾調變器原理 23 3.3 調變器之PN接面 25 3.4 MZM等效電路模型 29 3.4.1 模型公式分析 31 3.4.2 等效電路模擬 35 第 4 章 基板改良及串聯電感影響 47 4.1 前言 47 4.2 富陷阱層之探討 47 4.2.1 富陷阱層原理 47 4.2.2 基板串擾模擬 49 4.2.3 諧波失真模擬 54 4.2.4 富陷阱層對電感影響 61 4.3 MZM串聯電感 67 第 5 章 大訊號眼圖及晶片佈局 72 5.1 前言 72 5.2 MZM大訊號電路及眼圖 72 5.3 晶片佈局 78 5.3.1 標準元件修正 78 5.3.2 串聯電感設計 83 第 6 章 結論 87 6.1 研究成果討論 87 6.2 未來研究方向與展望 88 參考文獻 90

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