本研究論文包含兩個議題。第一個議題探討負阻抗轉換器電路，第二個議題探討頻率比較器。微型化天線在近幾年被廣泛的應用於特高頻(Ultra high frequency, UHF)，然而，如果使用被動Foster阻抗匹配網路來做阻抗匹配的話，天線的有效頻寬(efficiency-bandwidth)將會被限制。因此，本研究第一個議題欲透過負阻抗轉換器電路積體化解決上述問題，並分成兩個部分分析負阻抗轉換器電路。
第一部分設計出三種不同負載的負阻抗換器電路，適用頻帶為400MHz ~ 800MHz，使用UMC 0.18 µm 1P6M CMOS製程，此階段主要驗證負阻抗轉換器電路設計上的流程，並且分析負載為電感、電容、電感並聯電容的阻抗(Z)和導納(Y)特性，比較模擬與量測的結果，負阻抗轉換器電路晶片面積為0.998mm2(1.928 mm×0.518 mm)，消耗功率為6mW。
第二部分使用TSMC 0.18 µm 1P6M CMOS製程，證明負阻抗轉換器電路與天線結合有效達成增加天線頻寬，並且設計出兩種不同負阻抗轉換器版本與兩種不同尺寸的天線個別結合(Case 1 以及 Case 2)，適用於4G LTE(Long Term Evolution)頻段中的700MHz(Band28)。在負阻抗轉換器與天線結合後模擬結果，Case1情況天線頻寬為740MHz ~ 850MHz(14%)，Case2情況天線頻寬為690M ~ 780MHz(12.4%)，負阻抗轉換器晶片面積為1.174mm2(0.908 mm×1.293 mm)，消耗功率為11.04mW。
本研究第二個議題探討頻率比較器電路，使用UMC 0.18 µm 1P6M CMOS製程，頻率比較器電路包含二階低通濾波器、全波整流器、電壓比較器電路所構成。此頻率比較器適用頻率為300MHz–1GHz，解析度最大達到0.88%，頻率比較器晶片面積為0.497mm2(0.71 mm×0.7 mm)，消耗功率為4.42mW。

The present work aims to address the issues of negative impedance converter circuit and frequency comparator. With respect to the negative impedance converter circuit,
in recent years; Antenna Miniaturization has been widely used in the UHF (Ultra high frequency, UHF). However, if you use the passive foster matching network to do the impedance matching, the effective bandwidth of the antenna (efficiency-bandwidth) will be limited. To tackle this problem, the negative impedance converter was integrated and the results of such integration are divided into two parts for further analysis.
The first part contains the design of negative impedance converter circuit with three different loads. Suitable for 400MHz ~ 800MHz frequency range, this circuit used UMC 0.18 μm 1P6M CMOS technology. This part verified the design flow of the negative impedance converter circuit, analyzing properties of Impedance (Z) and Admittance (Y) with load of inductance, capacitance and inductance shunt capacitance. Furthermore, we compared the simulation results with the measurement ones. The negative impedance converter circuit chip area is 0.998 mm2 (1.928 mm×0.518 mm) and its power consumption is 6 mW.
The second part used TSMC 0.18 μm 1P6M CMOS process to demonstrate that the combination between antenna and negative impedance converter circuit can increase antenna bandwidth. To achieve this goal, two different versions of a negative impedance converter was designed and implemented with two different antenna sizes respectively (Case 1 and Case 2), which are suitable for 4G LTE (Long Term Evolution) frequency bands in 700MHz (Band28). As to the post-simulation results, in Case 1, Antenna bandwidth is 740MHz ~ 850MHz (14%). In Case 2, Antenna bandwidth is 690MHz ~ 780MHz (12.4%). The negative impedance converter circuit chip area is 1.174mm2(0.908 mm×1.293 mm) and its power consumption is 11.04 mW.
The second issue discussed the frequency comparator circuit. This circuit used UMC 0.18 μm 1P6M CMOS technology, which contained a second order low pass filter, a rectifier and a comparator. This frequency comparator is suitable for frequency of 300MHz ~ 1GHz with maximum resolution reaching 0.88%. The negative impedance converter circuit chip area is 0.497mm2(0.71 mm×0.7 mm) and its power consumption is 4.42 mW.

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