時間至數位轉換器是時間測量系統中相當重要的區塊，且針對不同的使用需求至今已發展出各式架構，其中游標卡尺法在追求高解析度上為眾多實現方式中的翹楚，但其量測範圍卻有無法超過一個參考週期的限制，因此有研究團隊提出以三個鎖相迴路做為時脈來源實現時間至數位轉換器，以達量測範圍不受限的目的，但在實際使用上需經外部繁雜的校正步驟才能使鎖相迴路鎖定在預期頻率，因此不具量產可能。有鑑於此，本論文將提出新的振盪電路：軟注入鎖定環形振盪器，利用高Q值的石英晶體對環形振盪器做軟注入鎖定，使振盪器能在訊號觸發後立即起振，且初始振盪頻率相當接近預期頻率，搭配修正公式更能於較長的待測時間使誤差落於±0.01%之內。另外，本電路架構可直接由40及74系列IC實現，相較於一般利用下線流程或FPGA實現的時間至數位轉換器，不僅能快速實現及驗證電路，更能有效降低成本，具大量生產的可能，對工業電子而言更是一大突破及貢獻。

A time-to-digital converter (TDC) plays an important role in time period measurement. Many kinds of TDC structure were developed for different requirements. Among them, the vernier-based time-to-digital converter is the best in terms of highly accurate time resolution. However, the input time period cannot exceed a period of the reference clock for the conventional vernier-based TDC. Therefore, a TDC structure that employs three PLL as reference clocks was purposed in literature for increasing the range of allowable time period. However it needs complicated calibration procedure. This makes it difficult in use practically. In this thesis, we purpose a new oscillation circuit for the TDC, a soft-injection-locked ring oscillator. It can oscillate immediately right after the trigger signal arrives. For measuring a long period of time, the deviation is less than 0.01% with correction formula. Moreover, the TDC structure employing the purposed oscillator can be implemented in 40- and 74-series ICs. Compared with the full-custom design flow or FPGA, the TDC in this thesis can be verified quickly and possesses very low manufacturing coast.

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