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研究生: 鄭積翔
Chi-Hsiang Cheng
論文名稱: 任務對應於網路單晶片設計之研究
A Study on Application Mapping for Mesh-Based Network-on-Chip Design
指導教授: 陳維美
Wei-Mei Chen
口試委員: 阮聖彰
Shanq-Jang Ruan
林敬舜
Ching-Shun Lin
沈中安
Chung-An Shen
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2015
畢業學年度: 103
語文別: 中文
論文頁數: 42
中文關鍵詞: 網路單晶片 (NoC)任務對應mesh topology
外文關鍵詞: Network-on-Chip (NoC), application mapping, mesh topology
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隨著VLSI製程技術上的進步,電子元件的體積逐漸縮小,單一晶片中可以放入更多的運算元件,這使得晶片上的資料傳輸量越來越龐大,因此過去常使用的傳輸方式已經無法負荷如此龐大的傳輸量。為了因應日漸複雜及龐大的傳輸需求,一種新的資料傳輸架構網路單晶片 (NoC) 被提出。任務對應(Application Mapping)是在設計上其中一個重要的議題,它將會直接的影響到晶片的能源消耗以及運算效率。此問題是屬於一種NP-hard問題,因此要如何在合理的時間內得到好的結果將是一個主要挑戰。
在本篇論文中我們提出了一個新的演算法SPMAP來解決在mesh topology上的任務對應問題,目的為降低能源消耗。此演算法會將原圖轉換為spanning tree之後計算每個core的degree以及在spanning tree中高度來決定擺放的順序,之後再將每個core放置於適當的位置。從比較結果可看出我們所提出的演算法在大多數的常見影音服務中可以找到與ILP相同的解,而在隨機benchmark的部分,當core的數量持續成長時,我們能用較短的時間獲得優於CastNet與NMAP的解。


Application mapping is an important part of Network-on-Chip (NoC) design, it tries to map the application onto a NoC-based platform. Because mapping an application onto the mesh architecture is NP-hard, there is no known algorithm for solving this problem in polynomial time. In this thesis, we propose a new application mapping algorithm for mapping an application onto the mesh topology Network-on-Chip architecture to minimize the energy consumption. We compare the proposed algorithm with some previously proposed algorithm and exact mapping technique. Our experiments on multimedia benchmarks show that the proposed mapping algorithm obtains the same solutions as the ILP generated solutions on most of case. On random benchmarks containing higher number of cores, we use less execution time to find better solution than CastNet and NMAP in large scale mesh-based NoC.

摘要 I Abstract II 目錄 III 圖索引 V 表索引 VI 第一章、緒論 1 1.1 研究背景 1 1.2 研究動機 3 1.3 論文架構 3 第二章、文獻探討 4 2.1網路單晶片架構 4 2.2 路徑選擇策略 6 2.3 能源模型 8 2.4 相關研究 9 2.4.1 系統式搜索 10 2.4.2啟發式搜索演算法 11 2.4.2.1變化型啟發式搜索演算法 11 2.4.2.2建構型啟發式搜索演算法 13 第三章、研究方法 16 3.1 問題描述 16 3.2 演算法主要流程 17 3.2.1展開spanning tree 19 3.2.2 Core擺放順序 21 3.2.3 Tile位置選擇機制 22 3.2.3.1 初始位置選擇 22 3.2.3.2 剩餘core放置 25 3.3 範例 26 第四章、實驗結果 30 4.1 模擬環境 30 4.2常見影音服務 31 4.3隨機benchmarks 34 4.3.1 高度因素與core數量對於結果之影響 34 4.4 時間比較 37 第五章、結論 39 參考文獻 40

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