研究生: |
林奕諴 Yi-hsien Lin |
---|---|
論文名稱: |
文件斜角偵測演算處理器之軟/硬整合設計與實現 Hardware/Software Co-design and Implementation of an Algorithmic Processor for Document Skew Detection |
指導教授: |
吳乾彌
Chen-Mie Mu |
口試委員: |
陳省隆
Hsing-Lung Chen 陳郁堂 Yie-Tarng Chen 陳漢宗 Hann-Trong Chen |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2010 |
畢業學年度: | 98 |
語文別: | 中文 |
論文頁數: | 110 |
中文關鍵詞: | 傾斜角度偵測 |
外文關鍵詞: | Skew Detection |
相關次數: | 點閱:139 下載:1 |
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本論文係有關角度偵測演算處理器之軟/硬體整合設計與驗證,相關研究工作包含四大部分:
第一部份為各類型二値化文件影像角度偵測演算法之軟體設計,並在分析其優缺點後,為了改善角度偵測之正確性而發展出MICC-Projection演算法。
第二部份為設計與實現MICC-Projection演算法之演算處理器,此處理器的設計包含MICC副處理器與Projection副處理器,並將其整合於SOPC系統中,再以Altera FPGA開發板實現之。
第三部份是撰寫演算處理器之相關驅動程式,再使用RPC-based驗證系統來驗證其功能。
第四部份是演算處理器之驗證、效能評估與執行效能。
整體而言,本論文係以研究二値化文件影像角度偵測演算法與其硬體處理器之設計為目標,並將其實作於FPGA開發板上。經由各種不同的二値化文件影像實驗,證實本論文所發展的演算法有極佳的角度偵測效果;同時,其相關之軟/硬整合設計方法,亦可以改善演算處理器設計與驗證流程之效率。
This thesis is related to the hardware/software co-design and verification of an algorithmic processor for skew detection. The research work includes four parts.
The first part is about software design of the various skew detection algorithms for binary document images. After analyzing the advantages and disadvantages of these algorithms, the MICC-Projection algorithm is developed to improve the correctness of skew detection.
The second part is to design and implement an algorithmic processor for the MICC-Projection algorithm which consists of MICC and projection sub-processors. The processor is integrated into an SOPC-based system and implemented on an Altera FPGA development board.
The third part is to write the related drivers for the algorithmic processor. Then the function of the algorithmic processor is verified through using a RPC-based verification system.
The fourth part is about the verification and evaluation of the run-time performance of the algorithmic processor.
On the whole, the goal of this thesis is to do researches on the development of a skew detection algorithm for binary document images. Then the related algorithmic processor is developed and implemented on the FPGA development board. After being verified by using various binary document images, the algorithm developed in this thesis has shown very good performance for skew detection. Meanwhile, it also shows that the hardware/software co-design method presented can improve the efficiency of both the design and verification flows.
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