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研究生: 吳孟穎
Meng-ying Wu
論文名稱: 以DSP為基礎之微型電網用IED 之製作與韌體開發
Hardware Implement and Firmware Development of a DSP-based Intelligent Electronic Device for Microgrid
指導教授: 辜志承
Jyh-cherng Gu
口試委員: 洪穎怡
none
何子儀
none
陳在相
none
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 中文
論文頁數: 162
中文關鍵詞: 微電網智慧型電子裝置
外文關鍵詞: microgrid, IED
相關次數: 點閱:192下載:4
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  • 本論文主要以數位信號處理器DSP為核心來製作智慧型電子裝置IED。本裝置為國科會計畫-併網型分散式電源數位保護電驛裝置的研究項目,本論文負責IED的製作與韌體開發。在軟體方面,包含各硬體模組間的相互聯絡、參數偵測法與相關演算法,如過/欠電壓、過電流、過/欠頻率、頻率變化率、相位跳躍與相序等電驛以及倂網演算法,並使用CCS軟體對各併網控制與故障保護演算法進行模擬,確保時序與功能之正確性;在硬體方面,製作7大模組,如控制、數位訊號控制器、量測、數位輸入/輸出、電源、人機介面與背板等硬體模組來與DSP作配合。接著將撰寫的併網控制與故障保護之程式下載至數位信號處理器晶片以及模組相關程式下載至各自微處理器晶片並作結合,完成智慧型電子裝置IED之原型機製作。為了測試智慧型電子裝置IED性能及可靠度,本文依照相關標準,以Matlab/Simulink建立範例電路並與波形重現器組成一模擬平台來檢視智慧型電子裝置IED併網與跳脫情形,最後完成智慧型電子裝置IED原型機之驗證。


    The hardware implement and firmware development of a DSP-based intelligent electronic device for microgrid is presented in this thesis. The device development is a National Science Council project with objective is design of the digital protection relay for distributed resources. The author is in charge of the hardware implementation and firmware development. In software study, it covers the interaction through hardware, the parameter detection, and relevant theories to design device such as over/under voltage, over current, over/under frequency, rate of change of frequency, vector jump, negative sequence voltage, and interconnected control. Therefore, this thesis uses Code Composer Studio (CCS) to simulate the action of the interconnected control and protection device algorithms that ensures the accuracy of the timing and function. In hardware study, there are seven modules which consist of Control, DSC, Measure, D-IO, Power, Keyboard & Display Module, and Backplane. After installed the programs to each module and integrate all modules, we would accomplish the development of a DSP-based intelligent electronic device. This thesis follows IEEE Standard 1547-2005 to simulate the test circuit by using Matlab/Simulink and build a workspace with the Doble device to verify the IED operation of interconnected control and fault protection. Finally, we would accomplish the testing performance both the IED and simulation.

    摘要 I Abstract II 誌謝 III 目錄 IV 圖目錄 VIII 表目錄 XIII 第一章 緒論 1 1.1 研究背景與動機 1 1.2 文獻回顧 2 1.3 研究方法 5 1.4 論文架構 5 第二章 微電網 7 2.1 簡介 7 2.2 微電網之架構 7 2.3 國際相關研究之現況 8 2.4 微電網之運轉偵測 15 2.5 微電網之保護協調 15 2.6 微電網之併網控制 17 2.7 本章小結 18 第三章 DSP及MCU發展系統 19 3.1 簡介 19 3.2 DSP數位信號處理器 20 3.2.1 TI-TMS320F28335之硬體特性 20 3.2.2 TI-TMS320F28335之軟體特性 21 3.2.3 TI-TMS320F28335 之功能架構 21 3.3 TI-TMS320F28335之功能綜述 21 3.3.1 系統時脈控制(Clock) 21 3.3.2 中斷(PIE) 22 3.3.3 CPU計時器(CPU Timer) 26 3.3.4 類比數位轉換(ADC) 27 3.3.5 通用輸入/輸出(GPIO) 28 3.3.6 串列通訊介面(SCI) 31 3.4 MCU微控制器 33 3.4.1 Atmel-AT89S8253之硬體特性 33 3.4.2 Atmel-AT89S8253之軟體特性 34 3.4.3 Atmel-AT89S8253之功能架構 34 3.5 Atmel-AT89S8253之功能綜述 35 3.5.1 中斷 35 3.5.2 計時/計數器 37 3.5.3 輸入/輸出介面 39 3.5.4 串列通訊介面 40 3.5.5 I2C匯流排介面 43 3.6 單晶片燒錄器 44 3.7 本章小結 46 第四章 智慧型電子裝置IED之建構 47 4.1 簡介 47 4.2 保護電驛裝置IED之基本架構 47 4.2.1 硬體架構 47 4.2.2 軟體架構 48 4.3 偵測參數之演算法建立 54 4.3.1 訊號之取樣 55 4.3.2 頻率之計算 56 4.3.3 傅立葉濾波演算法 60 4.4 相關電驛之建構及測試 63 4.4.1 過/欠電壓電驛 63 4.4.2 過電流電驛 67 4.4.3 過/欠頻率電驛 70 4.4.4 頻率變化率電驛 73 4.4.5 相位跳躍電驛 77 4.4.6 相序電驛 81 4.5 併網控制之設計 84 4.5.1 倂網控制之建構 84 4.5.2 倂網控制之測試 86 4.6本章小結 87 第五章 智慧型電子裝置IED之硬體模組設計 88 5.1 簡介 88 5.2 電源模組之設計 89 5.3 數位信號控制器模組之設計 92 5.4 控制模組之設計 95 5.5 量測模組之設計 99 5.6 人機介面模組之設計 103 5.7 數位輸入/輸出模組之設計 104 5.8 背板模組之設計 106 5.9 本章小結 107 第六章 智慧型電子裝置IED之測試及分析 108 6.1 簡介 108 6.2 應用Matlab/Simulink於範例系統之建立 108 6.3 波形重現模擬器之應用 113 6.4 環境模擬平台之架設 113 6.5 測試方法及步驟 114 6.6 環境模擬平台下之測試及分析 117 6.6.1 微電網倂網控制 117 6.6.1.1倂網模式 117 6.6.1.2 微電網模式 120 6.6.2 微電網倂網保護 122 6.6.2.1 系統側故障 122 6.6.2.2 微電網側故障 123 6.7 本章小結 126 第七章 結論與未來研究方向 128 7.1 結論 128 7.2 未來研究方向 129 參考文獻 130 作者簡介 136 附錄A 模擬電路圖 137 附錄B 模擬結果圖 141

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