NAND型快閃記憶體已經應用於許多消費性電子產品及嵌入式系統中，因為它擁有非揮發、低功率以及存取速度快等優點。應用於快閃記憶體控制的主流架構為多通道控制器架構，每個通道相當於一個匯流排，該架構於一個匯流排上掛載多顆NAND型快閃記憶體晶片，並透過多個匯流排同時操作多顆NAND型快閃記憶體晶片，這樣的存取方式我們稱為通道級平行化。然而，每個控制器只能存取其專屬匯流排上的NAND型快閃記憶體晶片而無法存取掛載於其他匯流排之NAND型快閃記憶體晶片，這種情形我們稱為通道限制，在多個請求需存取同一匯流排上的多個NAND型快閃記憶體晶片時，將會減低控制器處理的平行度，同時限制了多通道控制器與NAND型快閃記憶體晶片間多種配置的可變性。本論文中我們提出一個可平行化的多控制器平台來解決這個問題，根據實驗結果，該平台不僅可以模擬各種多通道控制器下，控制器與NAND型快閃記憶體晶片間的配置，亦以任意存取的存取特性解決通道限制下，控制器平行度降低的問題。

NAND flash memory has advanced along with the wave consumer electronics and embedded systems, because of its advantages of non-volatility, low power consumption, and faster access. Mainstream architecture used in flash memory control for multi-channel controller architecture and each channel is equivalent to a bus. The architecture mount NAND flash chip on a bus and use multiple bus access multiple NAND flash chips simultaneously, we call it channel level parallelism. However, each controller can only access the NAND flash chip on its own bus and can’t access other NAND flash chips which owned by other channel. We call the situation as the channel limit. The channel limit will reduce the controller’s execution parallelism when multiple requests will access those NAND flash chips on the same bus. It also limits the multiple configurations variability between the controller and NAND flash chips. In this paper, we will propose a parallelized multi-controller platform to solve this problem. According to experiment result, the platform can not only simulate variety configures between controller and NAND flash chips but also can solve the channel limit by any to any access feature.

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