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研究生: 林育賢
Yu-Xian Lin
論文名稱: 應用於WiMAX之1.2V 0.18μm連續時間式ΣΔ調變器晶片設計
1.2V 0.18μm Continuous-Time Sigma-Delta Modulator Chip Design for WiMAX Application
指導教授: 黃進芳
Jhin-Fang Huang
劉榮宜
Ron-Yi Liu
口試委員: 徐敬文
Ching-Wen Hsue
江正雄
Jen-Shiun Chiang
黃弘一
Hong-Yi Huang
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2008
畢業學年度: 96
語文別: 英文
論文頁數: 118
中文關鍵詞: 連續時間三角積分調變器低電壓寬頻
外文關鍵詞: Wideband, Continuous-Time, Low Voltage, Sigma Delta
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  • 隨著個人無線通訊的蓬勃發展,要達到高解析跟高頻寬還要降低功耗並降低系統的複雜度對手持無線通訊裝置是很重要的,其中類比\數位轉換器佔有很重要的角色。WiMAX 無線通信採用正交頻分多工(Orthogonal Frequency Division Multiplexing)調制技術以用來支持高速數據通能力,此標準在長距離跟介於1.25MHz到20MHz的高頻寬中提供較多的靈活度。超取樣三角積分類比\數位轉換器對高頻寬高解析的類比\數位轉換器是一種較好的解決辦法。目前有很多用離散時間方法做的交換電容電路三角積分調變器,但是因為積分器頻寬的限制,在數MHz級的頻寬以上很難做到高解析度。而在低電壓的設計之下,交換電容電路不僅需要額外的時脈提升電路且交換電容電路中的高阻抗開關會限制訊訊號的大小和取樣頻率,連續時間三角積分調變器因為積分器具有較高頻寬可以解決這些問題。
    本論文的研究方向為設計並實現應用於WiMAX的連續時間低電壓寬頻三角積分調變器,主要的三角積分調變器包含三個主動式電阻電容電路、回授DAC電路、額外的迴路延遲跟操作頻率在160MHz的多位元量化器來實現。應用台積電0.18微米1P6M的標準製程來實現晶片設計,在1.2伏特的供應電源下,功耗僅10.1mW。模擬結果顯示在取樣頻率160MHz,超取樣比為8之下,其最大的訊號雜訊失真比大約為62.9dB,其動態範圍為75dB,晶片實際量測結果顯示在取樣頻率160MHz,超取樣比為8之下,其最大的訊號雜訊失真比大約為62dB,其動態範圍為75 dB。


    With the flourishing of personal wireless communications development, to achieve high resolution with high bandwidth and reduce power consumption, complexity of handheld wireless devices is very important. The analog-to-digital (A/D) conversion plays an important role in the system signal quality. WiMAX wireless communication uses Orthogonal Frequency Division Multiplexing (OFDM) to transfer high data rates. The standard offers flexible for long distance and high bandwidth between 1.25MHz to 20MHz. With the progress of personal wireless communications based on the considerations of extending battery life achieving high resolution with several MHz bandwidth applications and reducing system complexity, which are especially important for portable wireless devices. The analog-to-digital (A/D) converters play an important role in the system.
    Over-sampling sigma-delta analogue-to-digital converters (ADCs), which provide a robust and economical solution for high-resolution and wideband analog-to-digital conversion. There are several wideband sigma-delta modulators using the structure of the discrete-time (DT) switched-capacitor (SC) but with high unity-gain bandwidth (UGB) requirements on the amplifiers in SC integrators, it has been difficult to extend the signal bandwidth implementations of sigma-delta modulators beyond a few MHz while maintaining high resolution. In low voltage design, the SC circuits need clock bootstrap and high switch resistance limits the signal dynamic range and limits the sampling frequency. Continuous-time (CT) sigma-delta modulator can be used to solve these problems.
    In this thesis, we design and implementation a low voltage, wideband, continuous-time sigma delta modulator for WiMAX application. The modulator mainly contains active-RC integrator, feedback DAC, and excess loop delay and 4-bits quantizer operation at 160MHz. The modulator dissipates 10.1 mW at 1.2 V supply voltage and is fabricated in the TSMC 0.18 um 1P6M CMOS technology. Measurement results show the modulator achieves 66.9 dB SNR, a peak 62.9 dB SNDR and 75dB dynamic range over a 10 MHz band at an over-sampling ratio of 8.

    List of Figures III List of Tables V Chapter 1 1 1.1 Motivation 1 1.2 WiMAX Introduction 2 1.3 Organization 4 Chapter 2 5 2.1 Quantization 5 2.2 Performance Metrics 8 2.3 Oversampling Technique 10 2.4 Noise-Shaping ΔΣ Modulator 13 2.4.1 First-Order Noise-Shaping 16 2.4.2 Second-Order Noise-Shaping 18 2.4.3 Higher-Order Noise-Shaping 20 2.5 Continuous-Time and Discrete-Time Loop Filter 21 2.6 Summary 23 Chapter 3 25 3.1 Introduction 25 3.2 CT ΣΔ Modulator System and specification 25 3.2.1 System Structure 26 3.3 DT-to-CT Conversion of ΣΔ Modulator 30 3.3.1 Modified Z-Transform 30 3.3.2 Excess Loop Delay in Continuous-Time ΣΔ modulator 35 3.4 Analysis of Non-Ideal Effects 36 3.4.1 Integrator Nonlinearity 37 3.4.2 Finite Op Amp Gain 39 3.4.3 Jitter Effects in CT ΣΔ modulator 41 3.4.4 Time-Constant Error 45 3.5 Summary 47 Chapter 4 49 4.1 Resistor-Capacitor Integrators 50 4.2 Comparator 60 4.3 Feedback DACs 62 4.4 Four-bit Flash ADC 65 4.5 Clock Generator and Digital Buffer 67 4.6 Floorplain and Layout 68 4.7 Simulation Results 69 4.8 Summary 73 Chapter 5 75 5.1 Test Setup 76 5.2 Experimental Results 77 5.3 Summary 81 Chapter 6 83 6.1 Conclusions 83 6.2 Future Work 83 Appendix 85 Appendix A:Chip Design of Voltage Controlled Oscillators for WiMAX Applications 86 Appendix B: Chip Design of High Q Band-Pass Filter for Bluetooth Applications 88 Appendix C:Chip Design of Switched-Capacitor Second Order ΣΔ Modulator 92 Appendix D: Chip Design of 1V Switched-Capacitor Second Order ΣΔ Modulator 94 Appendix E: 1.2V 0.18um Continuous-Time ΣΔ Modulator Chip Design for WiMAX Application 97 Bibliography 104

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