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研究生: 許家榮
Chia-jung Hsu
論文名稱: 應用FPGA設計一具有防止配電系統孤島運轉之SOC保護電驛
Design of a FPGA-based SOC Relay for Anti-islanding Protection on Distribution Systems
指導教授: 辜志承
Jyh-cherng Gu
口試委員: 何子儀
Tze-yee Ho
陳在相
Tsai-hsiang Chen
陳斌魁
none
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2006
畢業學年度: 94
語文別: 中文
論文頁數: 94
中文關鍵詞: 孤島運轉數位保護電驛
外文關鍵詞: anti-islanding, digital relay
相關次數: 點閱:166下載:3
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  • 本論文以基於FPGA的系統晶片(SOC)設計方式,開發適用於風力發電系統之被動式孤島運轉保護電驛,軟體方面包含過電流、過/欠電壓、過/欠頻率、頻率變化率、相位跳躍、逆電力、複合電壓變化率及功因變動等孤島偵測演算法則之撰寫,硬體方面則建構各演算法則之矽智產(Intellectual Property, IP)、ADC、週邊介面控制IP與加入現行可用之IP,經過整合並完成SOC孤島運轉保護電驛之製作。最後應用Matlab/Simulink模擬 IEEE Std.1547.1、IEEE Std.929及UL 1741所建議之孤島運轉測試電路與方法,其數位模擬結果再藉由doble電驛試驗器輸出對應之類比訊號進行SOC孤島運轉保護電驛之測試,由實測結果可知,本電驛可有效防範風力發電系統孤島運轉現象之發生。


    This thesis presents the development of a FPGA-based SOC islanding relay for wind power generation systems with islanding detection functions. In software, there are several islanding algorithms have been proposed including over current, over/under voltage, over/under frequency, rate of change of frequency, vector surge, reverse power, and compound rate of change of voltage and changes in power factors. In hardware, the major tasks are developing a new intellectual property (IP) for each islanding algorithm. In addition, integrate necessary ADC, peripheral controller IP and certain available IP cores to setup a prototype FPGA-based SOC islanding relay. Finally, Matlab/Simulink is introduced to simulate the testing circuit under islanding operation which is recommended by IEEE Std.1547.1, IEEE Std.929, and UL 1741. The simulated digital results will be transferred to analog output by using Doble relay tester. Then, the islanding functions of proposed relay can be verified with those analog signals. The results show that the proposed relay can effectively identified and prevented wind power generation systems from islanding operation.

    摘要 I Abstract II 誌謝 III 目錄 IV 圖目錄 VII 表目錄 X 第一章 續論 1 1.1 研究背景 1 1.2 研究動機 1 1.3 文獻回顧 2 1.4 研究方法 4 1.5 研究貢獻 5 1.6 論文架構 5 第二章 風力發電系統孤島運轉偵測方法之研究 7 2.1 簡介 7 2.2 孤島運轉偵測方法與偵測不感帶 8 2.3 被動式孤島運轉偵測方法 10 2.3.1 電壓偵測方式 10 2.3.2 頻率偵測方式 12 2.3.3 功率偵測方式 14 2.3.4 電流總諧波量偵測方式 15 2.3.5 複合式電力量偵測方式 17 2.4 被動式孤島運轉偵測方法比較 17 第三章 系統晶片與FPGA設計 19 3.1 簡介 19 3.2 FPGA之設計方法 20 3.2.1 FPGA簡介 20 3.2.2 FPGA之設計流程與Xilinx ISE發展系統 21 3.2.3 ModelSim模擬軟體 24 3.2.4 Verilog-HDL硬體描述語言 24 3.2.5 Spartan-3 MB開發系統 25 3.3 快速傅立葉轉換矽智產 27 第四章 風力發電系統之孤島保護電驛矽智產建構 34 4.1 簡介 34 4.2 過電流電驛 34 4.2.1 電驛IP建構 35 4.2.2 電驛合成 37 4.2.3 模擬測試分析 37 4.3 過/欠電壓電驛 39 4.3.1 電驛IP建構 39 4.3.2 電驛合成 39 4.3.3 模擬測試分析 40 4.4 過/欠頻率電驛 42 4.4.1 電驛IP建構 42 4.4.2 電驛合成 43 4.4.3 模擬測試分析 44 4.5 相位跳躍電驛(VSR) 46 4.5.1 電驛IP建構 46 4.5.2 電驛合成 47 4.5.3 模擬測試分析 48 4.6 頻率變化率電驛(ROCOF) 49 4.6.1 電驛IP建構 49 4.6.2 電驛合成 51 4.6.3 模擬測試分析 52 4.7 逆電力電驛 54 4.7.1 電驛IP建構 54 4.7.2 電驛合成 55 4.7.3 模擬測試分析 55 4.8 電壓變化率與功因變動電驛 57 4.8.1 電驛IP建構 57 4.8.2 電驛合成 58 4.8.3 模擬測試分析 59 4.9 孤島保護電驛之系統晶片 60 第五章 孤島保護電驛測試 62 5.1 簡介 62 5.2 孤島運轉測試電路標準 62 5.3 孤島電驛測試 67 5.3.1 孤島運轉模擬 67 5.3.2 波形重現模擬器於電驛測試之應用 70 5.3.3 孤島保護電驛測試步驟 72 5.4 測試結果分析 74 第六章 結論與未來研究方向 76 6.1 結論 76 6.2 未來研究方向 77 參考文獻 78 作者簡介 82 附錄A 電驛合成圖 83 附錄B 過/欠電壓與頻率之NDZ公式推導 92

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