研究生: |
許家榮 Chia-jung Hsu |
---|---|
論文名稱: |
應用FPGA設計一具有防止配電系統孤島運轉之SOC保護電驛 Design of a FPGA-based SOC Relay for Anti-islanding Protection on Distribution Systems |
指導教授: |
辜志承
Jyh-cherng Gu |
口試委員: |
何子儀
Tze-yee Ho 陳在相 Tsai-hsiang Chen 陳斌魁 none |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電機工程系 Department of Electrical Engineering |
論文出版年: | 2006 |
畢業學年度: | 94 |
語文別: | 中文 |
論文頁數: | 94 |
中文關鍵詞: | 孤島運轉 、數位保護電驛 |
外文關鍵詞: | anti-islanding, digital relay |
相關次數: | 點閱:166 下載:3 |
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本論文以基於FPGA的系統晶片(SOC)設計方式,開發適用於風力發電系統之被動式孤島運轉保護電驛,軟體方面包含過電流、過/欠電壓、過/欠頻率、頻率變化率、相位跳躍、逆電力、複合電壓變化率及功因變動等孤島偵測演算法則之撰寫,硬體方面則建構各演算法則之矽智產(Intellectual Property, IP)、ADC、週邊介面控制IP與加入現行可用之IP,經過整合並完成SOC孤島運轉保護電驛之製作。最後應用Matlab/Simulink模擬 IEEE Std.1547.1、IEEE Std.929及UL 1741所建議之孤島運轉測試電路與方法,其數位模擬結果再藉由doble電驛試驗器輸出對應之類比訊號進行SOC孤島運轉保護電驛之測試,由實測結果可知,本電驛可有效防範風力發電系統孤島運轉現象之發生。
This thesis presents the development of a FPGA-based SOC islanding relay for wind power generation systems with islanding detection functions. In software, there are several islanding algorithms have been proposed including over current, over/under voltage, over/under frequency, rate of change of frequency, vector surge, reverse power, and compound rate of change of voltage and changes in power factors. In hardware, the major tasks are developing a new intellectual property (IP) for each islanding algorithm. In addition, integrate necessary ADC, peripheral controller IP and certain available IP cores to setup a prototype FPGA-based SOC islanding relay. Finally, Matlab/Simulink is introduced to simulate the testing circuit under islanding operation which is recommended by IEEE Std.1547.1, IEEE Std.929, and UL 1741. The simulated digital results will be transferred to analog output by using Doble relay tester. Then, the islanding functions of proposed relay can be verified with those analog signals. The results show that the proposed relay can effectively identified and prevented wind power generation systems from islanding operation.
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