本論文利用差動傳輸線，來改善微帶線跨越雙端短路槽線的效能。適當地設計差動傳輸線，可以有效地降低微帶線跨越雙端短路槽線不連續的地平面時，造成阻抗不匹配所產生的反射雜訊，差動傳輸線提供的回流路徑可以改善輸出波形失真以及改善穿透時間延遲，同樣，利用差動傳輸線所提供的回流路徑，可以防止訊號透過槽線產生近端耦合雜訊、遠端耦合雜訊以及降低訊號耦合至雙端短路槽線所產生的EMI問題。在頻域方面，7 GHz以前的反射量皆在-25 dB以下，近端耦合量與遠端耦合量皆在-30 dB以下；能量損耗的最大值從27.4%降低至16.2%，能量輻射的最大值從20.3%降低至5.6%。在時域方面，反射雜訊從0.166V下降至0.034V，穿透延遲時間從0.23 ns改善至0.16ns，接近參考值0.15 ns，近端耦合雜訊與遠端耦合雜訊從0.094V下降至0.011V。在輸入訊號為8Gbps的眼圖表現方面，兩條使用差動傳輸線之微帶線跨越雙端短路槽線的接收端分別為V2與V4，V2眼高從23.6%改善至82.6%、V4眼高從24.4%改善至82%，V2眼寬從88.8%改善至99.2%、V4眼寬從88.5%改善至98.4%，V2抖動從53.2%降低至8.88%、V4抖動從62%降低至6.64%。
此外，我們亦使用差動傳輸線，來改善微帶線跨越一端短路一端開路槽線的效能。適當地設計差動傳輸線，可以有效地降低微帶線跨越雙端短路槽線不連續的地平面時，造成的阻抗不匹配所產生的反射雜訊，差動傳輸線所提供回流路徑，可以改善輸出波形失真以及改善穿透時間延遲，同樣，利用差動傳輸線所提供的回流路徑，可以防止訊號透過槽線產生近端耦合雜訊、遠端耦合雜訊以及降低訊號耦合至一端短路一端短路槽線所產生的EMI問題。在頻域方面，微帶線跨越開路槽線端，在4 GHz以前的反射量皆在-20 dB以下，4到7GHz因為寄生效應的關係會上升到-20 dB以上；微帶線跨越短路槽線端，在7 GHz以前的反射量皆在-20 dB以下；微帶線跨越開路槽線端或是微帶線跨越短路槽線端，兩者的近端耦合量與遠端耦合量皆在-30 dB以下；並且，能量損耗與能量輻射在5 GHz前能有效地被降低。在時域方面，微帶線跨越開路槽線端，反射雜訊從0.251V下降至0.046V，穿透延遲時間從0.39 ns改善至0.18 ns，接近參考值0.16 ns；微帶線跨越短路槽線端，反射雜訊從0.162V下降至0.039V，穿透延遲時間從0.23 ns改善至0.17ns，接近參考值0.16 ns；微帶線跨越開路槽線端或是微帶線跨越短路槽線端，兩者的近端耦合雜訊與遠端耦合雜訊從0.113V下降至0.008V。在輸入訊號為8Gbps的眼圖表現方面，微帶線跨越開路槽線的接收端為V2，微帶線跨越短路槽線的接收端為V4，V2眼高從1.6%改善至79.8%、V4眼高從26.8%改善至80%，V2眼寬從34.4%改善至98.4%、V4眼寬從90.4%改善至98.4%，V2抖動從594.24%降低至11.08%、V4抖動從48.8%降低至11.08%。

In this thesis,the differential transmission line is used to improve the performance of the microstrip line passing over the double-sided short-circuited slotline. Through properly designing the differential transmission line, the reflection noise, time delay, near-end noise, and far-end noise caused by the microstrip line passing over the double-sided short-circuited slotline can be efficiently reduced. From the perspective of the frequency domain response, the value of the reflection coefficient is less than -25 dB when the frequency is smaller than 7 GHz; the near-end and the far-end coupling are both smaller than -30 dB; the maximum power loss is reduced from 27.4% to 16.2% while the maximum radiation loss is reduced from 20.3% to 5.6%. From the perspective of the time domain response, the reflection noise is reduced from 0.166 V to 0.034 V; the time delay is reduced from 0.23 ns to 0.16 ns, approaching the reference value of 0.15 ns; the near-end and far-end noise is dropped from 0.094 V to 0.011 V.From the perspective of the eye diagram performance while the input signal is 8 Gbps, the eye height at one receiving end V2is increased from 23.6% to 82.6% while the eye height at the other receiving end V4 is increased from 24.4% to 82%; the eye width at one receiving end V2is increased from 88.8% to 99.2% while the eye width at the other receiving end V4 is increased from 88.5% to 98.4%;the jitter at one receiving end V2is decreased from 53.2% to 8.88% while the jitter at the other receiving end V4 is decreased from 62% to 6.64%。
Besides, the differential transmission line is used to improve the performance of the microstrip line passing over the slotline with both short-circuited and open-circuited ends.Through properly designing the differential transmission line, the reflection noise, time delay, near-end noise, and far-end noise caused by the microstrip line passing over the slotline with both short-circuited and open-circuited ends can be efficiently reduced. From the perspective of the frequency domain response, the reflection coefficient of the microstrip line passing over the open-circuited slotline is less than -20 dB when the frequency is smaller than 4 GHz while the reflection coefficient will be larger than -20 dB due to the parasitic effect when the frequency falls between 4 to 7 GHz. The reflection coefficient of the microstrip line passing over the short-circuited slotline is less than -20 dB when the frequency falls between DC and 7 GHz. For both cases of the microstrip line passing over the open-circuited slotline and the microstrip line passing over the short-circuited slotline, the near-end and far-end coupling are smaller than -30 dB. From the perspective of the time domain response, for the case of the microstrip line passing over the open-circuited slotline, the reflection noise is reduced from 0.251V to 0.046 V; the time delay is reduced from 0.39 ns to 0.18 ns, approaching the reference value of 0.16 ns. For the case of the microstrip line passing over the short-circuited slotline, the reflection noise is reduced from 0.162 V to 0.039 V; the time delay is reduced from 0.23 ns to 0.17 ns, approaching the reference value of 0.16 ns. Forboth cases of the microstrip line passing over the open-circuited slotline and the microstrip line passing over the short-circuited slotline, the near-end and the far-endnoises are reduced from 0.113V to 0.008 V. From the perspective of the eye diagram performance while the input signal is 8 Gbps, the eye height at the receiving end of the microstrip line passing over the open-circuited slotline V2is increased 1.6% to 79.8% while theeye height at the receiving end of the microstrip line passing over the short-circuited slotline V4is increased from 26.8% to 80%; the eye width at the receiving end V2 is increased from 34.4% to 98.4% while the eye width at the receiving end V4 is increased from 90.4% to 98.4%; the jitter at the receiving end V2 is decreased from 594.24% to 11.08% while the jitter at the receiving end V4 is decreased from 48.8% to 11.08%.

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