由於 金屬氧化物薄膜電晶體獨特的製程質及材料性，使 金屬氧化物薄膜電晶體獨特的製程質及材料性，使 金屬氧化物薄膜電晶體獨特的製程質及材料性，使 它們在新興的薄膜電晶 它們在新興的薄膜電晶 體應用上成為最具有競爭性的選擇，包含 體應用上成為最具有競爭性的選擇，包含 體應用上成為最具有競爭性的選擇，包含 均勻性好可以應用在大尺寸的面板、低溫 均勻性好可以應用在大尺寸的面板、低溫 均勻性好可以應用在大尺寸的面板、低溫 製程 而應用於可撓式的結構以及低成本 製作 等特殊需求的產品上。 等特殊需求的產品上。 為了滿足下一世代的顯 為了滿足下一世代的顯 示 器， TFT的載子遷移率需要更高，所以 的載子遷移率需要更高，所以 的載子遷移率需要更高，所以 的載子遷移率需要更高，所以 我們將使用 氧化 鋅錫來當作主動層，因為氧化 鋅錫來當作主動層，因為氧化 鋅錫來當作主動層，因為銦鋅錫具有比氧化鎵更高的載子遷移率，搭配 銦鋅錫具有比氧化鎵更高的載子遷移率，搭配 銦鋅錫具有比氧化鎵更高的載子遷移率，搭配 高介電常數 (High-k)料二氧化鉿 (HfO2)來製備元件之閘極絕緣層 (Gate Insulator)並且在 並且在 本論文 中研究 及評估以 IZTO-TFT5之電 特性 與穩定。
首先，我們利用金屬遮罩 (Shadow Mask)製作 TFT元件，並先以不通氧氣環境下製 元件，並先以不通氧氣環境下製 作 IZTO薄膜當作 主動層來製薄膜當作 主動層來製TFT元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證元件， 並分析其電特性使用霍爾量測加以佐證在來使用不同厚度的 IZTO薄膜當作 主動層來製薄膜當作 主動層來製TFT元件 ，並且用或爾量測與 並且用或爾量測與 AFM來分析電性圖的結果。為了降低 OFF電流，第二部份我們使用黃光的製程來作不同 電流，第二部份我們使用黃光的製程來作不同
II
主動層厚度 之元件，發現在主動層厚度 之元件，發現在主動層厚度 之元件，發現在90 nm之元件有最高的載子遷移率 (99 cm2/V s)， 並分析在不同厚度下之元件電特性以及遲滯，最重要的是我們也探討其對 並分析在不同厚度下之元件電特性以及遲滯，最重要的是我們也探討其對 並分析在不同厚度下之元件電特性以及遲滯，最重要的是我們也探討其對 於穩定性的表現探討，而在最後一個章節是我們結論以及未來展望。

Metal oxide semiconductor is considered to be the most competitive TFT material for last decade. It has several advantages such as great uniformity for large size display, low fabrication temperature and low production cost. For next generation display, the TFT device need be improve, spiecially in mobility. In order to pursue greater metal oxide TFT performance, IZTO was introduced as the active layer. Becauce IZTO-TFT have higher mobility than IGZO-TFT with the same dielectric about 30 (cm2/V s). To get higher mobility with IZTO-TFT, high-k dielectric was used as a gate insulator in TFT structure. Among all high-k dielectrics, HfO2 is well known for its high dielectric constant and large band gap. Therefore, we will focus on evaluating the basic properties and electrical characteristic of IZTO thin film as active layer in this study.
First, we made the TFT devices by using a shadow mask. We made an IZTO film as an active layer in an diffrient oxygen environment to fabricate a TFT deviec, and analyzed its electrical characteristics, using Hall measurements to prove it. Then the TFT deviecs were fabricated by using IZTO films with different thicknesses as active layers, and the electrical characteristic were analyzed HP4145b, proved by Hall measurement and AFM. In order to reduce the OFF current, the second part used the photolithograghy process to fabricate components with different active layer thicknesses. It is found that the active layer 90 nm device has the highest carrier mobility (99 cm2 / V s). The electrical characteristics and
IV
hysteresis of components at different thicknesses were analyzed, the most important thing is that we also explore the performance of stability at different thicknesses. In the final chapter is our conclusions and future prospects, and several comparisons had been made between our device and device which was fabricated in same process but different gate insulator

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