互補式振盪器注入鎖定倍頻器與倍頻器之熱載子應力分析

簡易檢索 / 詳目顯示

回結果列表

研究生：	黃偉誠 Wei-Chen Huang
論文名稱：	互補式振盪器注入鎖定倍頻器與倍頻器之熱載子應力分析 Injection-Locked Frequency Multiplier Based on a Complementary Oscillator and Analysis of Hot-Carrier-Stressed Switching-Mode Injection-Locked Frequency Multiplier
指導教授：	張勝良 Sheng-Lyang Jang
口試委員:	張勝良 Sheng-Lyang Jang 黃進芳 Jhin-Fang Huang 賴文政 Wen-Cheng Lai 徐茂修 Mao-Hsiu Hsu
學位類別：	碩士 Master
系所名稱：	電資學院 - 電子工程系 Department of Electronic and Computer Engineering
論文出版年：	2022
畢業學年度：	110
語文別：	英文
論文頁數：	116
中文關鍵詞：	倍頻器、熱載子
外文關鍵詞：	Multiplier, Hot-Carrier
相關次數：	點閱：211 下載：12
分享至:	分享至facebook 分享至twitter

查詢本校圖書館目錄查詢臺灣博碩士論文知識加值系統勘誤回報

上一筆

在無線通訊快速發展中，鎖相迴路扮演著重要的角色，典型的鎖相迴路由相位偵測器或相位頻率偵測器、充電汞、迴路濾波器、壓控振盪器和除頻器所構成。此外，為了降低單一壓控震盪器操作在高震盪頻率的難度，目前系統常用的是壓控震盪器加上倍頻器，設計較為簡單穩定，整體相位雜訊也較好。
章節三設計倍三注入鎖定電路(ILFT)，晶片面積為0.788 × 1.118 mm2，本架構提出一種新型單極ILFT，結合了互補式ILO和混頻型雙端注入三倍頻器。ILFT使用雙端注入，互補ILO使用一個NMOS和一個PMOS交叉耦合使其在較低功率下提供負阻抗，透過單端注入來當作多模數注入鎖定倍頻器ILFM。
章節四設計BiCMOS ILFT，晶片面積為1.18 × 1.2 mm2。此電路使用兩個SiGe HBT作為交叉耦合注入鎖定三倍頻器ILFT中的雙端注入元件與交叉耦合振盪器的諧振迴路並聯。
章節五研究熱載子應力對注入鎖定三倍頻器 ILFT的影響，晶片面積為 1.2×1.18 mm2。ILFT 採用開關式振盪器設計，應力電壓為 2.1 V，用於加速退化過程。此設定會降低鎖定範圍和相位雜訊。

With the rapid development of wireless communication, phase-locked loop plays a crucial role. Typically, the phase-locked loop is composed of phase detector or phase frequency detector, charge pump, loop filter, voltage-controlled oscillator and frequency divider. In addition, to reduce the challenges of high operating frequency with single phase-locked loop. The solution to it is using ILFM added to VCO. It makes the design easy with higher phase noise behavior.
Chapter 3 shows a new single-stage ILFT, combining a complementary ILO and a mixer-type shunt-injection frequency tripler. The ILFT uses the differential injection. The complementary ILO uses one NMOS and one PMOS cross-coupled to provide a negative resistance at lower power. The power consumption reduces because PMOS is in series and limits the current when injection FETs are on. This circuit is used as a multi-modulus ILFM by applying one phase injection as well.
Chapter 4 presents shunt-injection ILFTs. Two SiGe HBT are used as shunt injection devices in a cross-coupled injection-locked frequency tripler (ILFT). This design is a 0.18 μm BiCMOS injection locked frequency tripler using SiGe HBT injection devices in shunt with cross-coupled oscillator’s tank.
Chapter 5 studies the hot-carrier stress effect on an injection-locked frequency tripler (ILFT) in the TSMC 0.18 μm BiCMOS process. The die area is 1.2×1.18 mm2. The ILFT was designed with switching mode oscillator, and stress supply voltage is 2.1 V for accelerating the degradation process. The over-voltage bias degrades both the locking range and the phase noise.

摘要                I
Abstract        II
致謝                III
Table of Contents    IV
List of Figures        VII
List of Tables        XII
Chapter 1    Introduction    1
1    Background    1
2    Thesis Organization    4
Chapter 2    Overview of Voltage-Controlled Oscillators    5
1    Introduction    5
1.1    Two-Port Oscillator (Feedback Oscillator)    6
1.2    One-Port Oscillator (Negative Resistance)    7
2    Category of Oscillators    11
2.1    Ring Oscillator    11
2.2    LC-Tank Oscillator    12
3    Design Index of Voltage-Controlled Oscillator    21
3.1    Center Frequency [Hz]    21
3.2    Output Signal Power [dBm]    21
3.3    Power Dissipation [mW]    21
3.4    Harmonic/spurious [dBc]    21
3.5    Tuning Range [Hz]    22
3.6    Tuning Sensitivity [Hz/V]    23
3.7    Phase Noise [dBc/Hz]    23
3.8    Quality Factor    26
3.9    Figure of Merit    28
4    Passive Components Design in VCO    29
4.1    Resistor Design    29
4.2    Inductor Design    30
4.3    Capacitor Design    31
Chapter 3    Low Power Injection-locked Frequency Multiplier Based on a Complementary Oscillator    33
1    Introduction    33
2 Differential-Injection ILFT    36
2.1 Circuit Design of the ILFT    36
2.2 Experiment    43
3    Single-Phase-Injection Even-Modulus ILFM    49
3.1 Operation of the ILFQ    49
3.2    Experiment    53
Chapter 4     BiCMOS LC-tank Injection-Locked Frequency Tripler    63
1 Introduction    63
2    Circuit Design    65
3    Experiment of ILFT    69
4    Experiment of ILFQ    76
Chapter 5     Hot-Carrier-Stressed Switching-Mode Injection-Locked
Frequency Tripler    82
1    Introduction    82
2 Frequency Tripler Design    84
3    Experiment    85
Chapter 6     Conclusions    91
References        93

                                

[1] B. Razavi, “RF Microelectronics”, Upper Saddle River, NJ: Prentice Hall, 1998
[2] N. M. Nguyen and R. G. Meyer, “Start-up and frequency stability in high-frequency oscillators,” IEEE J. Solid-State Circuit, vol. 27, no. 5, pp. 810–820, May 1992.
[3] S. Smith, Microelectronic Circuit 4th edition, Oxford University Press 1998.
[4] B. Razavi, Design of Analog CMOS Integrated Crcuits, MC Graw Hall,2001.
[5] B. Razavi, “Design of Integrated Circuits for Optical Communications”, Mc Graw Hill.
[6] S.Levantino, C. Samori, A. Bonfanti, S. L. J. Gierkink, A. L. Lacaita, and V. Boccuzzi, “Frequency dependence on bias current in 5GHz CMOS VCOs:impact on tuning range and flicker noise upconversion”, IEEE J. Solid-State Circuits, vol. 37, pp.1001-1003, 2002.
[7] T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press, 1998.
[8] T. H. Lee, “The design of CMOS radio frequency integrated circuits”, Cambridge University Press, 1998.
[9] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179−194, Feb. 1998.
[10] J. J. Rael and A. A. Abidi, “Physical processes of phase noise in differential LC Oscillators,” IEEE Custom Integrated Circuits Conference, pp. 569−572, 2000.
[11] T. Lee and A. Hajimiri, “Oscillator phase noise: a tutorial,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326−336, Mar. 2000.

[12] T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press 1998.
[13] D. Hauspie, E.-C. Park, and J. Craninckx, “Wide-band VCO with simultaneous switching of frequency band, active core, and varactor size,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1472–1480, Jul. 2007.
[14] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by-128/ 129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July 1996.
[15] K. Yamamoto, “A 1.8 V operation 5 GHz-band CMOS frequency doubler using current-reuse circuit design technique,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1288–1295, Jun. 2005.
[16] S.-L. Jang, J.-J. Chen, C.-C. Liu and M.-H. Juang, ” Injection-locked frequency tripler with series-tuned resonator in 0.13 μm CMOS technology,” Microw. Optical Tech. Lett., pp.1107-1110, May, 2010.
[17] M.-C. Chen and C.-Y. Wu, “Design and analysis of CMOS subharmonic injection locked frequency triplers,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1869–1877, Aug. 2008.
[18] Z. Chen and P. Heydari, "An 85-95.2 GHz transformer-based injection-locked frequency tripler in 65nm CMOS," 2010 IEEE MTT-S International Microwave Symposium, 2010, pp. 776-779.
[19] D. M. Kang, H. S. Lee, S. H. Kim, T. H. Jang, C. W. Byeon, and C. S. Park, “A +3.0-dBm 115–129-GHz CMOS power-efficient injection-locked frequency tripler chain,” IEEE Microw. Wireless Compon. Lett., vol. 30, no. 5, pp. 508–511, May 2020.
[20] C. Kuo and T. Yan, "A 60 GHz injection-locked frequency tripler with spur suppression," IEEE Microw. Wireless Compon. Lett., vol. 20, no. 10, pp. 560-562, Oct. 2010.
[21] A. Li, S. Zheng, J. Yin, H. C. Luong and X. Luo, "A CMOS 21-48GHz fractional-N synthesizer employing ultra-wideband injection-locked frequency multipliers," Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, pp. 1-4, 2013.
[22] C.-C. Chen, J.-W. Wu and T.-F. Chiao, “Dual-injection sub-harmonic injection-locked frequency tripler,” IEEE Microwave Conference Proceedings, pp. 1214-1216, Dec. 2012
[23] L. Iotti, G. LaCaille and A. M. Niknejad, "A 57–74-GHz tail-switching injection-locked frequency tripler in 28-nm CMOS," IEEE J. Solid-State Circuits, vol. 2, no. 9, pp. 115-118, Sept. 2019.
[24] H. -T. Huang, M. -H. Wu, Y. -H. Lin, T. -W. Huang and J. -H. Tsai, "A 3.7 mW 75-87-GHz injection-locked frequency tripler using bandwidth-enhanced transformer-coupled topology for automatic radar applications," 2015 European Microwave Conference (EuMC), pp. 399-402.
[25] J. Zhang, H. Liu, C. Zhao and K. Kang, "A 22.8-to-43.2GHz tuning-less injection-locked frequency tripler using injection-current boosting with 76.4% locking range for multiband 5G applications," 2018 IEEE International Solid - State Circuits Conference - (ISSCC), pp. 370-372, 2018.
[26] W. -C. Lai, S. -L. Jang, H. -A. Yeh and M. -H. Juang, "A low-power injection-locked frequency tripler in 90 nm CMOS technology," 2020 IEEE 5th Int. Conf. Integrated Circuits and Microsystems (ICICM), Nanjing, China, pp. 96-100, 2020.
[27] Y. H. Chang, “V-band CMOS injection-locked frequency tripler using differential harmonic current injection technique,” Analog Integr Circ Sig Process 109, pp.241–246, 2021.
[28] H. F. Zhou, K.M. Shum, and C. H. Chan, ” Wide locking range frequency tripler based on a dual-band VCO,”Electronics Letters ,vol. 56, no. 21, pp. 1122 – 1124, 05 Nov 2020.
[29] M. Hossain, K. Nosaeva, N. Weimann, V. Krozer and W. Heinrich, "A 330 GHz active frequency quadrupler in InP DHBT transferred-substrate technology," 2016 IEEE MTT-S Int. Microwave Symp. (IMS), 2016, pp. 1-4.
[30] A. Bossuet et al., "A 135–150 GHz frequency quadrupler with 0.5 dBm peak output power in 55 nm SiGe BiCMOS technology," 2015 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM, 2015, pp. 186-189.

簡易檢索 / 詳目顯示

相關論文