本論文針對目前市場上較具有延伸性潛力的薄膜電晶體分別提出兩套新式的製程技術並加以優化達到降低成本與高穩定的電特性。首先，金屬氧化物薄膜電晶體一般都採用下閘極上接觸式的結構，因為要考慮到光罩間對位的誤差，而將其汲極和源極設計成與閘極各有一覆蓋區域，產生寄生電容而影響電晶體操作速度。另外為了防止在定義汲極和源極圖形時，蝕刻製程會對主動層造成傷害，傳統製程都會多加一層蝕刻阻擋層以保護下方材料，因此加入的製程增加了光罩數量影響了整體成本，以傳統的薄膜電晶體製程來說，四至五道黃光是無法避免的。因此我們提出了一種利用新式自我對準結構來製作薄膜電晶體元件，以減少寄生電容，且在光罩數目上縮減至兩道；並以接觸電阻分析、電性分析、電容-電壓特性、反向器上昇時間，與傳統非自我對準結構之元件作綜合性的比較以證明寄生電容效應的降低。再搭配鐵氟龍與二氧化矽組合之雙層保護層，其以熱蒸鍍製作之鐵氟龍用來防止a-IGZO薄膜因濺鍍二氧化矽的過程中所受到的電漿損害。並探討此方法製作的保護層與未使用保護層的元件，在不同大氣環境與閘極偏壓下之穩定度。
其次，我們提出了一套新式低成本的微波加熱技術，我們將此技術運用於聚乙烯苯酚(PVP)有機物的交聯，並將其作為閘極絕緣層以製作有機薄膜電晶體。傳統微波加熱的技術需使用較高的微波功率才能達到有效的加熱效果，也因此消耗了不少成本，另外傳統微波加熱技術因為是使用極化極性分子而造成的旋轉延遲損耗所產生的熱能，因此在這先天性的物理局限上，微波的運用被大為縮減。另外在傳統聚乙烯苯酚(PVP)有機物的交聯使用烤箱的傳導性加熱，熱在傳導到主體前會快速衰退，在熱能的運用上相當缺乏效率，因此拉長了整體製程時間。為了克服以上問題，我們運用了微波在金屬表面上衰退成表面電流的特性用，將閘極金屬快速升溫以快速交聯其上方之閘極絕緣層。另外針對此新式微波加熱技術的優化，我們分別探討壓力，功率，時間之間的影響，並透過FTIR及AFM等物理分析，加以佐證。而優化過後的技術大幅縮短了交聯的時間。從傳統一個小時的烤箱加熱縮減至只需五分鐘。且利用降低壓力的方式也成功的把傳統需要幾千瓦的微波功率縮減至只需五十瓦。因此相信此新式微波技術相當具其潛力，可大幅的提高能量的運用達到了低成本節能的目標。

In this thesis, two novel process scheme were proposed for thin-film transistors. At first , we focus on Metal oxide thin-film transistor (TFT) its high mobility and transparency, The Metal oxide thin-film transistor (TFT) that are employed in displays are typically fabricated using back-channel-etching structure and five photomasks, including the definition of an etching-stop (ES) layer to protect the a-IGZO active layer from damage caused by etching the source/drain (S/D) electrodes. However, TFTs that involve an ES require a misalignment margin for the ES to ensure the good contact between the S/D and the induced channel; thus, high parasitic capacitances (Cgd, Cgs) could occur, decreasing the operational speed of the TFT circuit. In this study, a new two-photo-mask process with continuous-etching Scheme was proposed for fabricating a-IGZO TFTs that exhibit self-aligned structures but lack ES layers. And the ITO metal was designed as S/D metal to meet the requirement of the continuous etching process. Thus, S/D metal, IGZO and gate insulator can simultaneously be etched. Combining the BUV exposure and backside-lift-off (BLO) schemes can prevent the damage when etching the S/D electrodes, reduce the number of photo-masks required during fabrication, and minimize the parasitic capacitance.
Second, a Microwave-Induction Heating (MIH) scheme is proposed for the PVP gate insulator cross-linking process to replace the traditional oven heating cross-linking process. Traditional microwave annealing is known to be effective for heating because of its advantages include thermal uniformity, rapid heating process, shortened manufacturing period, and low thermal budget. In previous study, the microwave annealing scheme is always used for heating the semiconductor film because some materials cannot be absorbed by the microwave energy, such as insulators. Therefore, materials heated by using microwave radiation will be limited by the selective-heating characteristic of microwave. In addition, the high microwave power was also a serious issues leading to a trade-off between fabrication cost and device performance. In this study, it is the first time that microwave-Induction Heating (MIH) scheme is proposed for the PVP gate insulator cross-linking process to replace the traditional oven heating process. As compared traditional oven heating, the heating time is significantly decreased from 1 hour to 5 minutes by using MIH scheme and the used power is reduced to about 50 W. Therefore, for the cross-linking process of PVP, the throughput can be reduced by above 50% and the power can be also significantly reduced. Thus, it believes that the proposed MIH scheme will be a low thermal budget process, which is more suitable for flexible devices application in the future. We therefore suggest this technology has a great potential to replace the traditional thermal heating for the PVP gate insulator cross-linking process.

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G. Gu, and M. G. Kane, “Moisture induced electron traps and hysteresis in pentacene based organic thin-film transistors,” Appl. Phys. Lett. Vol. 92 pp.053305 (2008).
T. H. Kim, C. G. Han, and C. K. Song, “Instability of threshold voltage under constant bias stress in pentacene thin film transistors employing polyvinylphenol gate dielectric,” Thin Solid Films, Vol. 516 pp.1232 (2008).
T. Umeda, D. Kumaki, and S. Tokito, “High air stability of threshold voltage on gate bias stress in pentacene TFTs with a hydroxyl-free and amorphous fluoropolymer as gate insulators,” Org. Electron.Vol. 9 pp.545 (2008).
X. Cheng, M. Caironi, Y. Y. Noh, J. Wang, C. Newman, H. Yan, A. Facchetti, and H. Sirringhaus, “Air stable cross-linked cytop ultrathin gate dielectric for high yield low-voltage top-gate organic field-effect transistors” Chem. Mater., Vol. 22 pp.1559 (2010).
S. H. Kim, J. Jang, H. Jeon, W. M. Yun, S. Nam, and C. E. Park, “Hysteresis-free pentacene field-effect transistors and inverters containing poly(4-vinyl phenol-co-methyl methacrylate) gate dielectrics” Appl. Phys. Lett., Vol. 92 pp.183306 (2008).
L. Jiang, J. Zhang, D. Gamota, and C. G. Takoudis, “Organic thin film transistors with novel thermally cross-linked dielectric and printed electrodes on flexible substrates” Org. Electron., Vol. 11 pp.959 (2010).
H. Klauk, M. Halik, U. Zschieschang, G. Schmid, W. Radlik, and W. Weber, “High-mobility polymer gate dielectric pentacene thin film transistors” Journal of Applied Physics. Vol. 92 pp.5259 (2002).
P. Liu, Y. Wu, Y. Li, B. S. Ong, and S. Zhu, “Enabling Gate Dielectric Design for All Solution-Processed, High-Performance, Flexible Organic Thin-Film Transistors” J. Am. Chem. Soc. Vol. 128 pp.4554 (2006).
S. Mototani, S. Ochiai, X. Wang, K. Kojima, A. Ohashi and T. Mizutani, “Performance of Organic Field-Effect Transistors with Poly(3-hexylthiophene) as the Semiconductor Layer and Poly(4-vinylphenol) Thin Film Untreated and Treated by Hexamethyldisilazane as the Gate Insulator” Jpn. J. Appl. Phys. Vol.47 pp.496 (2008).
J. Jang, S. H. Kim, S. Nam, D. S. Chung, C. Yang, W. M. Yun, C. E. Park and J. B. Koo, “Hysteresis-free organic field-effect transistors and inverters using photocrosslinkable poly(vinyl cinnamate) as a gate dielectric” Appl. Phys. Lett. Vol. 92 pp.143306 (2008).
S. De Vusser, J. Genoe and P. Heremans, “Influence of transistor parameters on the noise margin of organic digital circuits” IEEE Electron DEV. Vol. 53 pp.601 (2006)
S. Steudel, S. De. Vusser, K. Myny, M. Lenes, J. Genoe and P. Heremans, “Comparison of organic diode structures regarding high-frequency rectification behavior in radio-frequency identification tags” J. Appl. Phys., Vol. 99 pp. 114519 (2006).
H. L. Hortensius, A. Öztürk, P. Zeng, E. F. C. Driessen, and T. M. Klapwijk, “Microwave-induced nonequilibrium temperature in a suspended carbon nanotube,” Appl. Phys. Lett., Vol. 100, no. 22, pp. 223112-1 – 223112-3. (2012)
L. F. Teng, P. T. Liu, Y. J Lo, and Y. J. Lee, “Effects of microwave annealing on electrical enhancement of amorphous oxide semiconductor thin film transistor,” Appl. Phys. Lett., vol. 101, no. 13, pp. 132901-1 – 223112-5. (2012)
C. S. Fuh, P. T. Liu, L. F. Teng, S. W. Hung, Y. J. Lee, and H. P. D. Shieh, ” Effects of Microwave Annealing on Nitrogenated Amorphous In-Ga-Zn-O Thin-Film Transistor for Low Thermal Budget Process Application,” IEEE Electron Device Lett., vol. 34, no 9, pp.1157–1159, (2013)
K. W. J and W. J. C, “Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation,” Appl. Phys. Lett., vol. 105, no. 21, pp. 213505-1 –213505-5.(2014)
S. Lee, B. Koo, J. Shin, E. Lee, H. Park, and H. Kim, “Effects of hydroxyl groups in polymeric dielectrics on organic transistor performance,” Appl. Phys. Lett., vol. 88, no. 16, pp. 162 109-1–162 109-3, (2006).
Y. H. Noh, S. Y. Park, S. M. Seo, and H. H. Lee, “Root cause of hysteresis in organic thin film transistor with polymer dielectric,” Org. Electron., vol. 7, no. 5, pp. 271–275, Oct. (2006).
G. Gu, and M. G. Kane, “Moisture induced electron traps and hysteresis in pentacene based organic thin-film transistors,” Appl. Phys. Lett., vol. 92, no. 5, pp. 053 305-1–053 305-3, Feb. (2008).
T. H. Kim, C. G. Han, and C. K. Song, “Instability of threshold voltage under constant bias stress in pentacene thin film transistors employing polyvinylphenol gate dielectric,” Thin Solid Films, vol. 516, no. 6, pp. 1232–1236, Jan. (2008).
T. Umeda, D. Kumaki, and S. Tokito, “High air stability of threshold voltage on gate bias stress in pentacene TFTs with a hydroxyl-free and amorphous fluoropolymer as gate insulators,” Org. Electron., vol. 9, no. 4, pp. 545–549, Aug. (2008).
X. Cheng, M. Caironi, Y. Y. Noh, J. Wang, C. Newman, H. Yan, A. Facchetti, and H. Sirringhaus, “Air stable cross-linked Cytop ultrathin gate dielectric for high yield low-voltage top-gate organic field-effect transistors,” Chem. Mater., vol. 22, no. 4, pp. 1559–1566, Jan. (2010).
S. H. Kim, J. Jang, H. Jeon, W. M. Yun, S. Nam, and C. E. Park,“Hysteresis-free pentacene field-effect transistors and inverters containing poly(4-vinyl phenol-co-methyl methacrylate) gate dielectrics,” Appl. Phys. Lett., vol. 92, no. 18, pp. 183 306-1–183 306-3, May. (2008).
L. Jiang, J. Zhang, D. Gamota, and C. G. Takoudis, “Organic thin film transistors with novel thermally cross-linked dielectric and printed electrodes on flexible substrates,” Org. Electron., vol. 11, no. 5, pp. 959–963, May. (2010).
H. Klauk, M. Halik, U. Zschieschang, G. Schmid, W. Radlik, and W. Weber, “High-mobility polymer gate dielectric pentacene thin film transistors,” Journal of Applied Physics., vol. 92, no. 9, pp. 5259–5263, Oct. (2002).
P. Liu, Y. Wu, Y. Li, B. S. Ong, and S. Zhu, “Enabling Gate Dielectric Design for All Solution-Processed, High-Performance, Flexible Organic Thin-Film Transistors” J. Am. Chem. Soc., vol. 128 no. 14, pp. 4554–4555, Mar. (2006).
S. Mototani, S. Ochiai, X. Wang, K. Kojima, A. Ohashi, T. Mizutani, “Performance of Organic Field-Effect Transistors with Poly(3-hexylthiophene) as the Semiconductor Layer and Poly(4-vinylphenol) Thin Film Untreated and Treated by Hexamethyldisilazane as the Gate Insulator” Jpn. J. Appl. Phys., vol. 47 no. 1, pp. 496–500, Jan. (2008).
J. Jang, S. H. Kim, S. Nam, D. S. Chung, C. Yang, W. M. Yun, C. E. Park and J. B. Koo, “Hysteresis-free organic field-effect transistors and inverters using photocrosslinkable poly(vinyl cinnamate) as a gate dielectric”, Appl. Phys. Lett., vol. 92, no. 143306, pp. 143306-1 – 143306-3. Apr. (2008)
S. De Vusser, J. Genoe and P. Heremans, “Influence of transistor parameters on the noise margin of organic digital circuits,” IEEE T. ELECTRON. DEV., vol. 53, no. 4, pp. 601– 610. Apr. (2006).
S. Steudel, S. De. Vusser, K. Myny, M. Lenes, J. Genoe and P. Heremans, “Comparison of organic diode structures regarding high-frequency rectification behavior in radio-frequency identification tags,” J. Appl. Phys., vol. 99, no. 11, pp. 114519-1 – 143306-7. Jun. (2006).
C. L. Fan, M. C. Shang, M. Y. Hsia, S. J. Wamg, B. R. Hung and W. D. Lee, “Poly(4-vinylphenol) Gate Insulator with Cross-linking using a Rapid Low-Power Microwave Induction Heating Scheme for Organic Thin-Film-Transistors,” APL Mater., vol. 4, no. 3, pp. 036105-1 –036105-5. Jan. (2016).