研究生: |
楊仁凱 Ren-kai Yang |
---|---|
論文名稱: |
新型多模態注入鎖定除頻器之設計 Design of Novel Multi Mode Injection-Locked Frequency Dividers |
指導教授: |
張勝良
Sheng-lyang Jang |
口試委員: |
黃進芳
Jhin-fang Huang 徐敬文 Ching-wen Hsue 馮武雄 Wu-shiung Feng |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2009 |
畢業學年度: | 97 |
語文別: | 英文 |
論文頁數: | 95 |
中文關鍵詞: | 壓控振盪器 、注入鎖定除頻器 、多模態除頻器 |
外文關鍵詞: | LC-tank injection-locked frequency divider, multi-modulus, wide-locking range |
相關次數: | 點閱:316 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本論文提出三個除頻器,第一個電路先描述一個除二新型寬鎖頻範圍注入鎖定除頻器,是使用 TSMC 0.18 μm CMOS製程。此注入鎖定除頻器是除二電路。量測結果為供應電壓0.75 V,而可調範圍3.910至3.956 GHz,核心電流為5.01 mA,核心功耗為3.76 mW。注入訊號為0 dBm時,其除二鎖頻範圍為4.23至11.30 GHz。
第二個電路描述一個除三注入鎖定除頻器,此電路是使用TSMC 3P3M BiCOMS 0.35 μm製程,此注入鎖定除頻器是除三電路,量測結果為供應電壓1.2 V,而可調範圍則是使用電壓來改變可變電容,達到頻率可調的機制。可調範圍由1.188 GHz至1.004 GHz,當入射功率為-3 dBm時,其總鎖頻範圍為3.03 GHz至3.68 GHz,總功耗為2.05 mW。
最後一個電路是描述一個多模數注入鎖定除頻器,是使用TSMC 0.18 μm CMOS製程,此注入鎖定除頻器可以當作一個除一電路、除偶數或奇數的除頻器,量測結果為供應電壓1.5 V,而可調範圍4.85至5.13 GHz,核心電流為2.78 mA,核心功耗為4.17 mW。注入訊號為0 dBm時,其除1 (2, 3, 4)鎖頻範圍為3.72 to 8.69 (8.42 to 10.95, 13.66 to 16.03, 19.13 to 20.5) GHz。
Firstly, this thesis presents a new wide locking range injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process. The ILFD is based on a differential VCO with one injection MOSFET for coupling the external signal to the resonator. The locking range of the ILFD is increased by using a new LC resonator. Measurement results show that at the supply voltage of 0.75 V, the divider’s free-running frequency is tunable from 3.91 to 3.956 GHz, and at the incident power of 0 dBm the locking range is about 7.07 GHz (91 %), from the incident frequency 4.23 to 11.3 GHz. The ILFD has a record locking range percentage among published divide-by-2 LC-tank cross-coupled ILFDs.
The second circuit is an LC-tank oscillator-based divide-by-3 injection locked frequency divider (ILFD), and it was implemented in the 0.35 μm SiGe 3P3M BiCMOS technology. Measurement results show that when the supply voltage Vdd is biased at 1.2 V, the free-running oscillation frequency of the ILFD is tunable from 1.19 GHz to 1.0 GHz, and at the incident power of -3 dBm the operation locking range is about 0.65 GHz, from the incident frequency 3.03 to 3.68 GHz. The core power consumption is 2.05 mW at Vdd = 1.2 V.
Finally, a new wide-locking range multi-modulus LC-tank injection locked frequency divider (ILFD) is proposed and was fabricated in a 0.18 μm CMOS process. The ILFD circuit is realized with a complementary MOS LC-tank oscillator and an injection composite composed of an inductor in series with an injection MOS. The two output terminals of the injection composite are connected to the resonator outputs. The ILFD can be used as a first-harmonic oscillator (ILO), even-modulo or odd-modulo oscillator depending upon the incident frequency of injection signal. At the supply voltage of 1.5 V, the free-running frequency is from 4.85 GHz to 5.13 GHz, the current and power consumption of the divider without buffers are 2.78 mA and 4.17 mW respectively. At the incident power of 0 dBm, the locking range in the divide-by-1(2, 3, 4) mode is from the incident frequency 3.72 to 8.69 (8.42 to 10.95, 13.66 to 16.03, 19.13 to 20.5) GHz.
[1] J. Roggers, C. Plett, Radio Frequency Integrated Circuit Design, Artech House, 2003.
[2] B. Razavi, RF Microelectronics, Prentice Hall PTR, 1998.
[3] B. Razavi, “A study of phase noise in CMOS oscillators, ” IEEE J. Solid-State Circuits, vol. 31, p.p. 331-343 Mar. 1996.
[4] K. Shu, E. Sanchez-Sinencio, CMOS PLL Synthesizers : Analysis and Design, Springer, 2005.
[5] A. Porret, T. Melly, C. Enz, and E, Vittoz, “Design of high-Q varactors for low-power wireless applications using a standard CMOS process,” IEEE J. Solid-State Circuits, vol. 35, pp. 337-345, Mar. 2000.
[6] F. Svelto, P. Erratico, S. Manzini, and R. Castello, “A metal oxide semiconductor varactor,” IEEE Electron Device Lett., vol. 20, pp. 164-166, Apr. 1999.
[7] P. Andreani and S. Mattisson, “On the use of MOS varactors in RF VCO’s,” IEEE J. Solid-State Circuits, vol. 35, pp. 905-910, Jun. 2000.
[8] T. Soorapanth, C. Yue, D. Shaeffer, T. Lee, and S. Wong, “Analysis and optimization of accumulation-mode varactor for RF ICs,” in 1998 Symp. VLSI Circuits Dig. Tech. Papers, , pp. 22-23. Jun. 1998.
[9] J. Aguilera, and R. Berenguer, “Design and test of integrated inductors for RF applications,” Kluwer Academic Publishers, 2004.
[10] J. Craninckx, and M. S. J. Steyaert, “A fully integrated CMOS DCS-1800 frequency synthesizer,” IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2054-2065, 1998.
[11] Y. K. Koutsoyannopoulos and Y. Papananos, “Systematic analysis and modeling of integrated inductors and transformers in RF IC design,” IEEE Trans. Circuits and System-II, vol. 47, no. 8, pp. 699-713, 2000.
[12] A . Zolfaghari, A. Chan, and B. Razavi, “Stacked inductors and transformers in CMOS technology,” IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, Apr. 2001.
[13] Y. Koutsoyannopoulos, “Novel Si integrated inductor and transformer structure for RF IC design,” Proc. ISCAS , vol. 2, pp. 573-576, June. 1999.
[14] C. Tang, C. Wu, and S. Liu, “Miniature 3-D inductors in standard CMOS process,” IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 471-480, 2002
[15] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Trans. on Parts, Hybrids and Packaging, vol. PHP-10, no.2, pp. 101-109, 1974.
[16] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE J. Solid-State Circuits, vol. 35, pp. 1368-1382, Sept. 2000.
[17] P.-C. Huang, M.-D. Tsai, H. Wang, C.-H. Chen, and C.-S. Chang, “A 114GHz VCO in 0.13μm CMOS technology,” IEEE International Solid-State Circuits Conference, vol. 1, pp.404-606, 6-10 Feb. 2005.
[18] B. Razavi, Design of Analog CMOS Integrated Circuits, Mc Graw Hill, 2001.
[19] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by-128/ 129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July 1996.
[20] Q. Huang and R. Rogenmoser, “Speed optimization of edge-triggered CMOS circuits for gigahertz single-phase clocks,” IEEE J. Solid-State Circuits, vol. 31, pp. 456-463, Mar. 1996.
[21] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, pp. 594-601, Apr. 2004.
[22] H. R. Rategh, and T.H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June 1999.
[23] H. D. Wohlmuth and D. Kehrer, “A high sensitivity static 2:1 frequency divider up to 27 GHz in 120 nm CMOS,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 823-826, Sept. 2002.
[24] M. Tiebout, “A 480 uW 2 GHz ultra low power dual-modulus prescaler in 0.25 um standard CMOS,” IEEE International Symposium on Circuit and System (ISCAS), vol. 5, pp. 741-744, May 2000.
[25] H. Wu, and A. Hajimiri, “A 19 GHz 0.5 mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” IEEE ISSCC Dig. Tech. Papers, pp. 412-413, Feb. 2001.
[26] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1 GHz and 2.8 GHz CMOS injection- locked ring oscillator prescalers,” IEEE Symposium on VLSI Circuits, pp. 47-50, June 2001.
[27] P. Kinget, R. Melville, D. Long, and V. Gopinathan, “An Injection Locking Scheme for Precision Quadrature Generation,” IEEE J. Solid-State Circuits, vol. 37, pp. 845-851, July 2002.
[28] W. Z. Chen, and C. L. Kuo, “18 GHz and 7 GHz superharmonic injection-locked dividers in 0.25pm CMOS technology,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 89-92, Sept. 2002.
[29] H. Wu, “Signal generation and processing in high-frequency/high-speed silicon- based integrated circuits,” PhD thesis, California Institute of Technology, 2003.
[30] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp.1380-1385, Oct. 1973.
[31] Y.-H. Chuang, S.-H. Lee, R.-H. Yen, S.-L. Jang, J.-F. Lee and M.-H. Juang, “A wide locking range and low voltage CMOS direct injection-locked frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 299–301, May 2006.
[32] S.-L. Jang and C.-F. Lee, “A wide locking range LC-tank injection locked frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 8, pp.613–615, Aug. 2007.
[33] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1170–1174, July 2004.
[34] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813–821, June 1999.
[35] S.-L. Jang, S.-S. Huang, J.-F. Lee and M.-H. Juang, “LC-tank Colpitts injection-locked frequency divider with record locking range,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 8, pp. 560–562, Aug. 2008.
[36] H. Wu and L. Zhang, “A 16-to-18GHz 0.18μm epi-CMOS divide-by-3 injection-locked frequency divider,” in 2006 ISSCC, pp.602-603.
[37] J. Jeong, S. Kim, W. Choi, H. Noh, K. Lee, K.-S. Seo, and Y. Kwon, “W-band divide-by-3 frequency divider using 0.1 μm InAlAs/InGaAs metamorphic HEMT technology,” Electronics Letts., vol. 41, no. 18, pp. 1005-1006, Sep.2005.
[38] S.-L. Jang, W.-H. Yeh, C.-F. Lee, and M.-H. Juang, “A low power CMOS divide-by-3 LC-tank injection locked frequency divider ,” Microwave and Optical Technology Lett., vol. 50, no. 1, pp.259-262, Jan. 2008.
[39] S.-L. Jang, C.-F. Lee, and W.-H. Yeh, “A divide-by-3 injection locked frequency divider with single-ended input,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, pp.142-144, Feb. 2008.
[40] M. Soyuer, J. N. Burghartz, H. A. Ainspan, K. A. Jenkins, P. Xiao, A. R. Shahani, M. S. Dolan, and D. L. Harame, “An 11-GHz 3-V SiGe voltage controlled oscillator with integrated resonator,” IEEE J. of Solid-State Circuits, vol. 32, no. 9, pp. 1451-1454, Sep. 1997.
[41] K. Yamamoto and M. Fujishim, “70 GHz CMOS harmonic injection locked divider,” In IEEE Int. Solid-State Circuits Conf. Dig., pp. 600-601, Feb. 2006.
[42] S.-H. Lee, S.-L. Jang, C.-F. Lee, and M.-H. Juang , ” Wide locking range divide-by-4 injection locked frequency dividers,” Microwave and Optical Technology Lett., Vol. 49, No. 7, pp. 1533-1536, July 2007.
[43] S.-L. Jang, C.-Y. Lin, and C.-F. Lee, ” A low voltage 0.35um CMOS frequency divider with the body injection technique,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp.470-472, July, 2008.
[44] S.-L. Jang, C.-C. Liu and C.-W. Hsue,” LC-tank injection locked frequency divider with variable division ratio,” Microwave and Optical Tech. Lett., pp. 3232-3236, Dec. 2008.
[45] S.-L. Jang, P.-X. Lu, C.-F. Lee and M.-H. Juang ,” Divide-by-3 LC injection locked frequency divider with a transformer as an injector’s load,” Microwave and Optical Tech. Lett., pp. 2722-2725, Oct. 2008.
[46] S.-H. Li, S.-L. Jang, Y.-S. Chuang and C.-F. Li, “A new LC-tank voltage controlled oscillator,” in IEEE Asia-Pacific Cir. Syst. Conf., Dec. 2004, pp. 425 – 427.