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| 研究生： |
周富笙 Fu-Sheng Chou |
|---|---|
| 論文名稱： |
使用高密度電感之注入鎖定除頻器 High-Density inductance Injection-Locked Frequency Dividers |
| 指導教授： |
張勝良
Sheng-Lyang Jang 鍾勇輝 Yung-Hui Chung |
| 口試委員: |
張勝良
Sheng-Lyang Jang 莊敏宏 Miin-Horng Juang 宋峻宇 Jiun-Yu Sung 溫俊瑜 Jiun-Yu Wen |
| 學位類別： |
碩士 Master |
| 系所名稱： |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
| 論文出版年： | 2021 |
| 畢業學年度： | 109 |
| 語文別： | 英文 |
| 論文頁數： | 112 |
| 中文關鍵詞： | 除頻器 、高密度電感 |
| 外文關鍵詞： | divider, High-Density inductance |
| 相關次數： | 點閱：339 下載：8 |
| 分享至: |
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在RF射頻收發機中，頻率合成器的特性非常重要，內部包含了相位偵測器(PFD)、充電幫浦(CP)、迴路濾波器(LF)、壓控振盪器(VCO)、除頻器(FD)，而這其中又以壓控振盪器和注入鎖定除頻器特性為主要電路。壓控振盪器需要低相位雜訊來避免相鄰雜訊訊號經由混波轉換的干擾，壓控振盪器的輸出在經由除頻器來達到降頻的工作，因此除頻器必須具有高的操作頻寬與頻率。本篇論文提出二種除頻器，一種倍頻器。
首先，本文通過模擬和測量研究了寬頻帶注入鎖定分頻器（ILFD）在0.18μmCMOS製程中的射頻性能。 ILFD使用電感器諧振器與寄生FET電容器作為LC諧振器並聯，並且還使用電容性交叉耦合對產生負電阻來啟動振盪。電容性交叉耦合對的柵極偏置用於調整自由運行的ILFD振盪頻率。使用雙絞感應線圈的ILFD具有較低的電磁（EM）輻射水平，高電感密度，並且對接收到的EM噪聲較不敏感，並且它使用雙絞串聯的四個八邊形子環路。在3.64 mW的功耗和0 dBm的輸入功率下，從9.2 GHz到12.1GHz的鎖定範圍為2.9 GHz。在較高的功耗下，將測量雙頻帶鎖定範圍，帶有分佈電容器和寄生電容器的雙絞電感器形成分佈式雙共振諧振器，從而通過頻帶重疊實現寬鎖定範圍ILFD設計。
其次，本文設計了以0.18μmCMOS製程製造的CMOS LC-tank注入鎖定頻率三倍頻器（ILFT），並描述了ILFT的電路設計，工作原理和測量結果。差分輸入和輸出ILFT電路由一個第一諧波注入鎖定振盪器（ILO）和一個混頻器型三倍頻器組成，以向ILO提供注入信號。國際勞工組織的自由運行頻率約為6.5 GHz。直流功耗為4.24 mW，入射功率為0 dBm時，鎖定範圍為入射頻率2至2.56 GHz，以提供頻率為6 GHz至7.68 GHz的輸出信號源。設計的電路可以用作一次諧波ILO和注入鎖定倍頻器和有源倍頻器。
第三，本文設計了電流重用的CMOS注入鎖定振盪器（ILO）和功率放大器（PA）驅動器。台積電0.18μm3P6M BiCMOS製程中的ILOPA驅動器的裸片面積為1.149×1.127 mm2。在電源電壓為1.8 V時，ILO-PA驅動器的鎖定範圍為
1.5 GHz至5 GHz。該電路具有很寬的鎖定範圍，並且在低輸入功率時具有高功率增益。
In the RF radio frequency transceiver, frequency synthesizer is very important, it’s components include the phase detector (PFD), charging pump (CP), loop filter (LF), voltage controlled oscillator (VCO), frequency divider. The voltage controlled oscillator needs low phase noise to avoid the interference of adjacent noise signals through the mixing conversion. The output of the voltage controlled oscillator is reduced by the frequency divider, so the frequency divider must have high operation bandwidth and frequency. This thesis proposes two kinds of frequency dividers and one kind of frequency multiplier.
First, this thesis studies the RF performance of a wide-band divide-by-2 injection-locked frequency divider (ILFD) in the 0.18 μm CMOS process by simulation and measurement. The ILFD uses an inductor resonator to shunt with the parasitic FET capacitor as the LC resonator, and it also uses a capacitive cross-coupled pair to generate negative resistance for start-up oscillation. The gate bias of the capacitive cross-coupled pair is used to tune the free-running ILFD oscillation frequency. The ILFD using a twisted inductive coil have low electric-magnetic (EM) radiation level, high inductance density and less sensitive to received EM noise, and it uses four octagonal sub-loops in twisted series. At the power consumption of 3.64 mW and at the input power of 0 dBm, the locking range is 2.9 GHz from 9.2 GHz to 12.1GHz. At higher power consumption, dual-band locking ranges are measured, the twisted-inductor with distributed capacitor and the parasitic capacitor forms a distributed dual-resonance resonator enableing wide locking range ILFD design by band overlapping.
Secondly, this thesis designs a CMOS LC-tank injection locked frequency tripler (ILFT) fabricated in 0.18 μm CMOS process and it describes the circuit design, operation principle and measurement results of the ILFT. The differential input and output ILFT circuit is made of a first-harmonic injection-locked oscillator (ILO) and a mixer-type frequency tripler to supply an injection signal to the ILO. The free-running frequency of the ILO is around 6.5 GHz. At the dc power consumption is 4.24 mW and at the incident power of 0 dBm, the locking range is from the incident frequency 2 to 2.56 GHz to provide an output signal source from the frequency 6 GHz to 7.68 GHz. The designed circuit can be used as a first harmonic ILO and injection-locked frequency doubler and active frequency doubler.
Third, this thesis designs a current-reused CMOS injection locked oscillator (ILO) and power amplifier (PA) driver. The ILOPA driver in the TSMC 0.18 μm 3P6M BiCMOS process occupies a die area of 1.149×1.127 mm2. At supply voltage 1.8 V, the locking range of the ILO-PA driver is from 1.5 GHz to 5 GHz. The circuit has wide locking range and high power gain at low input power.
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