研究生: |
鐘國豪 Kuo-Hao Chung |
---|---|
論文名稱: |
以FPGA實現即時前車偵測系統和路標偵測系統 A Real-Time Preceding Vehicle Detection System and Road Signs Detection System Implemented on FPGA |
指導教授: |
王乃堅
Nai-Jian Wang |
口試委員: |
鍾順平
Shun-Ping Chung 方劭云 Shao-Yun Fang 郭景明 Jing-Ming Guo 莊季高 Jih-Gau Juang |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電機工程系 Department of Electrical Engineering |
論文出版年: | 2017 |
畢業學年度: | 105 |
語文別: | 中文 |
論文頁數: | 54 |
中文關鍵詞: | 即時 、前車偵測 、路標偵測 、現場可程式邏輯閘陣列 、影像處理 、物件連通標記 |
外文關鍵詞: | Real-time, Preceding vehicle detection, Road signs detection, FPGA, Image process, Fast connected-component labeling |
相關次數: | 點閱:800 下載:6 |
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近年來,人民生活素質提昇,所以對行車的安全也越來越重視,因此車輛安全駕駛的研究也變得越重要。現在智慧型運輸系統發展的一部分即是智慧型車輛,而智慧型車輛的發展又以安全駕駛為其最重要的一項,所以我們提出這套系統去提醒駕駛在道路上的安全。
本論文提出一個以純硬體的數位電路設計出即時前車和路標偵測系統,系統分為兩部分:(1)前車偵測系統,(2)路標偵測系統。在這前車系統的六個步驟為:(1)影像裁切,(2)陰影偵測,(3)膨脹與侵蝕,(4)物件連通標記法,(5)車輛檢查,(6)定位。路標偵測系統的六步驟為: (1)影像裁切,(2)路標顏色偵測,(3)膨脹與侵蝕,(4)物件連通標記法,(5)濾除器,(6)定位。將這些步驟分別設計成硬體電路模組,此系統是用Verilog硬體描述語言(Hardware Description Language)以純硬體的方式設計並在Altera DE2-70多媒體開發平台實現。
實驗結果顯示此系統使用了39,872(58%)個邏輯元件(logic elements)、系統功率消耗為694.33mW,前車偵測系統偵測率為90%而路標偵測系統偵測率為87%,且處理速度為每秒達30張影像(NTSC Input)。
Recently, intelligent transportation systems have been grown rapidly and become a very popular topic. With the enhancement of the living quality, the safety driving becomes more and more important. The safety driving of intelligent vehicles plays an important role and draws lots of attention in the intelligent transportation system. Many researches are proposed to provide information concerning the safety driving to the driver and decrease the dangerous driving accidents.
In this thesis, we proposed a real-time preceding vehicle detection and road signs detection system implemented on hardware design. Our system is composed of two parts: (1)Preceding vehicle detection system, (2)Road signs detection system. There are six steps in preceding vehicle detection system: (1)Image cropped, (2)Shadow detection, (3)Morphology, (4)Labeling, (5)Vehicle extraction, (6)Location. There are six steps in road signs detection system: (1)Image cropped, (2)Road signs color detection, (3)Morphology, (4)Labeling, (5)Filterings, (6)Location. Each step is designed by a hardware circuit module written in Verilog HDL. Finally, the proposed hardware architecture is implemented in the Altera DE2-70 development board to test the feasibility of our hardware design. Experimental results show that our system is achievable by 39,872 logic elements and 694.33mW in power dissipation. The detection rate of the preceding vehicle detection system is 90% and that of road signs detection system is 87%. It can operate in real-time at a frame rate of 30fps.
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[15] 許維仁,基於SVM之即時路標偵測與提取系統,國立台灣科技大學電機工程系碩士論文,民國一百零五年。
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URL:https://www.terasic.com.tw/
[17] USB DVD 268 技術手冊,
URL:https://www.momoshop.com.tw/goods/GoodsDetail.jspi_code=2821237/