研究生: |
蔡岳恩 Yueh-En Tsai |
---|---|
論文名稱: |
極化碼置信度傳播暨神經網路位元翻轉解碼器之硬體設計 The Hardware Design of Belief Propagation With Neural Network Flip for Polar Codes |
指導教授: |
王煥宗
Huan-Chun Wang |
口試委員: |
王瑞堂
Jui-Tang Wang 林敬舜 ChingShun Lin 劉建成 Jian-Cheng Liu |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2023 |
畢業學年度: | 111 |
語文別: | 中文 |
論文頁數: | 70 |
中文關鍵詞: | 極化碼 、極化碼解碼器 、置信度傳播 、超大型積體電路 |
外文關鍵詞: | Polar Code, Polar Code Decoder, Belief Propagation, VLSI |
相關次數: | 點閱:309 下載:0 |
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本論文提出極化碼(Polar code)置信度傳播暨神經網路位元翻轉解碼器,並且使用超大型積體電路(Very Large Scale Integration, VLSI)硬體設計,主要目標為提高置信度傳播(Belief Propagation)的準確率,因此使用置信度傳播解碼器做為演算法的基礎,加入位元翻轉以提高解碼效能。翻轉集的部分利用神經網路(Neural Network)中的多層感知機(Multilayer Perceptron)來取代傳統的關鍵集(Critical Set)選出每筆資料最適合的翻轉位置,同時加入神經網路訓練的 Scaled Min-sumapproximate,在減少 BP 迭代次數的同時維持一定的準確率,進而提高吞吐量。
本論文使用 Python 作為演算法之軟體模擬平台,並且設計硬體架構,與傳統的置信度傳播解碼器相比,可以在效能方面取得優勢。
This paper proposes a Belief Propagation and Neural Network Bit-Flipping
Decoder for Polar codes, using Very Large Scale Integration (VLSI) to hardware design.
The main objective is to enhance the accuracy of Belief Propagation (BP) by
incorporating bit-flipping techniques to improve the decoding performance. The
flipping set is determined using a Multilayer Perceptron instead of the traditional
Critical Set, selecting the most suitable flipping positions for each data instance.
Additionally, the scaled Min-sum approximate, trained by the Neural Network, is
introduced to reduce the number of BP iterations while maintaining a certain level of
accuracy, thereby improving the throughput.
Python is used as the software simulation platform for algorithm development in
this paper. Furthermore, a hardware architecture is designed to demonstrate the
advantages over traditional Belief Propagation decoders in terms of performance.
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