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研究生： 羅靖昱
Ching-Yu Lo
論文名稱： 具分壓器之高效率兩級穩壓模組
High-Efficiency Two-Stage Voltage Regulator Module with Voltage-Divider
指導教授： 羅有綱
Yu-Kang Lo
邱煌仁
Huang-Jen Chiu
口試委員: 林忠義
Chung-Yi Lin
林景源
Jing-Yuan Lin
學位類別： 碩士
Master
系所名稱： 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年： 2013
畢業學年度： 101
語文別： 中文
論文頁數： 85
中文關鍵詞： 多相交錯式降壓穩壓器 、兩級系統 、分壓器 、輕載效率
外文關鍵詞： Multi-phase interleaved step-down voltage regula, two-stage system, voltage divider, light-load efficiency
相關次數： 點閱：209  下載：6 
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    • 傳統多相交錯式降壓穩壓器均係透過提高開關切換頻率，來改善系統暫態響應以及縮小LC濾波器。但於高頻切換操作時，因切換損耗所造成的輕載轉換效率大多不盡理想，使得伺服器整體運作時能源轉換效率無法獲得提升。本論文首先透過實作驗證兩級降壓架構之可行性，前後級皆為多相交錯式降壓模組所組成。前級操作於相對低切換頻率，並將輸入電壓降壓至一半提供給後級輸入，而後級操作於高切換頻率以提高系統頻寬，結果證實相較於傳統單級降壓架構其輕載效率大幅改善，且重載效率略為提升。另一方面，為了同時保有兩級降壓架構的優點以及更進一步節省成本以及體積，本文透過實作分壓器以取代前級多相式降壓模組，經實驗證明其最高轉換效率可達近97%。

    In the conventional multi-phase interleaved step-down voltage-regulator, the switching frequency is usually raised to improve system transient response and reduce LC filter size. However, the conversion efficiency is poor at light load under high switching frequency. It deteriorates the overall efficiency performance during whole server operation period. Firstly, the feasibility of a two-stage system was verified. The system consists of two multi-phase interleaved step-down modules. The pre-stage circuit is operated at relatively low switching frequency and reduces the input voltage of the post-stage by half. The post-stage is operated at higher switching frequency to increase the system bandwidth. The two-stage system can improve the light-load efficiency significantly and heavy-load efficiency slightly. On the other hand, in order to keep two-stage system’s advantage and further save the cost and reduce total size, a voltage divider has been implemented as the pre-stage module. According to the experimental verifications, a 97% conversion efficiency can be achieved.

    摘 要 I ABSTRACT II 誌 謝 III 目 錄 IV 圖索引 VI 表索引 IX 第一章 緒論 1 1.1 研究背景 1 1.2 文獻回顧 2 1.3 論文大綱 4 第二章 降壓電壓調節器架構及原理 5 2.1 單相同步降壓轉換器原理與簡介 5 2.1.1 連續導通模式 7 2.1.2 輸出電壓漣波 8 2.1.3 電感電流漣波 10 2.2 多相交錯式控制技術 11 2.3 同步降壓轉換器損耗分佈與分析 14 2.4 兩級降壓架構介紹與分析 23 2.5 分壓器 26 第三章 兩級降壓電源模組硬體設計 31 3.1 兩級降壓模組設計規格 32 3.2 前級分壓器電路架構設計 33 3.2.1 MOSFET驅動器選用 33 3.2.2 功率開關選擇 35 3.2.3 CTOP、COUT與CFLY電容選擇 37 3.3 後級多相同步降壓轉換器電路架構設計 38 3.3.1 ISL6308 多相同步降壓控制器相關參數設計 39 3.3.2 輸出端電容漣波電流 41 3.3.3 輸出電容選擇 42 3.3.4 輸出電感選擇 45 3.3.5 後級Power MOSFET選擇 46 3.3.6 ISL6308電路模擬 54 3.4 電路設計軟體及印刷電路板規劃 56 3.5 電路實作成果 58 第四章 實作驗證與分析 59 4.1 實驗設備規格介紹 59 4.2 前級分壓器運作特性量測 62 4.3 前級分壓器轉換效率量測 67 4.4 後級ISL6308三相交錯式降壓轉換器運作特性量測 68 4.5 後級ISL6308三相交錯式降壓轉換器效率量測 70 4.6 兩級降壓實作電路運作特性量測及效率分析 73 第五章 結論及未來研究方向 81 5.1 結論 81 5.2 未來改進及研究方向 82 參考文獻 83

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