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研究生: 鄭智文
Chih-Wen Cheng
論文名稱: 可調式匹配網路改善射頻前端電路特性
Improved Characteristics of RF Front-end Circuitry Using Tunable MEMS Matching Network
指導教授: 張勝良
Sheng-Lyang Jang
口試委員: 徐敬文
Ching-Wen Hsue
溫俊瑜
Jiun-Yu Wen
賴文政
Wen-Cheng Lai
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2018
畢業學年度: 106
語文別: 中文
論文頁數: 98
中文關鍵詞: 匹配網路射頻前端電路
外文關鍵詞: Matching Network, RF Frond-end Circuitry
相關次數: 點閱:129下載:3
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此論文提出利用微機電製程製作的可調式數位電容陣列,將其並聯至 LTE
行動裝置的天線開關模組輸出端匹配網路,讓此輸出端匹配網路的阻抗匹配值可
以依據不同頻段做調整,降低每個頻段的消耗電流。此可調式數位電容陣列具備
了高線性度,低插入損耗,高 Q 值的優點,相當適合應用在射頻前端電路中。
而且現今的 LTE 頻段已經相較 3G 時代多出許多,但是在傳統的射頻前端架構限
制下,天線開關模組輸出端仍然只能維持一組匹配網路,為了讓匹配網路能適用
於每個頻段,此匹配網路的阻抗匹配值通常只能維持在 50Ω,因此將可調式數
位電容陣列並聯入此匹配網路中,形成可調式匹配網路。接著再依據不同頻段而
調整阻抗匹配值,可提升測詴頻段的附加功率效率與改善線性度。依據測詴頻段
的不同,消耗電流改善 2.08%~5.64%。在線性度方面,依據測詴通道的不同可
改善相鄰通道洩漏比例 0.97dB~3.6dB。依據測詴結果,此可調式匹配網路確實
可以針對各測詴通道與測詴頻段的不同,改善其消耗電流與線性度。


In this thesis, we present a method which shunts a digital tunable capacitor arrays in
the matching network at the antenna switch module output port. This digital tunable
capacitor arrays has the advantage of low insertion loss, high quality factor and high
linearity. It is suitable to be a RF front-end component.
Nowadays the LTE frequency bands are more than 3G frequency bands but we still
use only one matching network at the antenna switch output. The impedance in this
matching network is close to 50ohm, so we put a digital tunable capacitor arrays into
this matching network and make it to be a tunable matching network. We can
optimize the impedance matching network on each operation frequency bands. We
can improve the power-added efficiency and linearity. We get 2.08% ~ 5.64%
improvements on the current consumption on each operation frequency bands. In the
linearity, we got 0.97dB ~ 3.6dB improvements on the adjacent channel leakage ratio
on each operation frequency bands. Referring to the test results, this tunable matching
network is a workable solution for improving the current consumption and linearity in
each operation frequency bands.

論文摘要 I Abstract II 誌謝 III 表目錄 VII 圖目錄 IX 第一章 緒論 1 1.1 研究動機 1 1.2 研究目的 3 1.3 論文結構 4 第二章 射頻前端電路 5 2.1 功率放大器 5 2.1.1 放大增益 6 2.1.2 附加功率效率 8 2.2 雙工器 9 2.3 天線開關模組 11 2.4 適應性功率追蹤晶片 12 2.4.1 動態電源控制 12 2.4.2 適應式功率追蹤 17 2.5 非線性失真 19 2.5.1 諧波失真 19 2.5.2 1dB壓縮點 20 2.5.3 交互調變失真與截取點 21 第三章 阻抗匹配與測試標準 25 3.1 阻抗匹配 25 3.1.1 阻抗匹配形式 25 3.1.2 可調式數位電容陣列 27 3.2 測試項目及規範 30 3.2.1 消耗電流 30 3.2.2 最大輸出功率 30 3.2.3 相鄰通道洩漏比率 32 3.2.4 頻率誤差 33 3.2.5 誤差向量幅度 34 第四章 實驗步驟與測試結果 36 4.1 實驗模擬與測試架設 36 4.1.1 系統架構與測試架設 36 4.1.2 阻抗匹配量測 40 4.2 量測結果 42 4.2.1 最大消耗電流 42 4.2.2 相鄰通道洩漏比例 45 4.2.3 最大輸出功率 49 4.2.4 頻率誤差 59 4.2.5 誤差向量幅度 63 第五章 結論 71 5.1 測試結果分析 71 5.2 應用與改進 73 參考文獻 75

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