本篇論文提出了一顆變壓器耦合之傳輸線四相位壓控震盪器，以及兩顆注入鎖定除頻器，分別為四相位左手LC共振腔除二注入鎖定除頻器、三頻帶除二注入鎖定除頻器。此外亦對多個左手LC共振腔的注入鎖定除頻器架構進行研究，以及改善應用似傳輸線共振腔之除二注入鎖定除頻器。
首先，我們提出了一寬除頻範圍之四相位左手LC共振腔除二注入鎖定除頻器(QILFD)。此除頻器使用台積電0.18微米製程，此除頻器使用電容交叉耦合的壓控震盪器做為核心且結合單注入MOSFET。晶片面積為1.101×1.169 mm2，當工作電壓操作在1伏特，注入訊號強度為0dBm時，可得注入鎖定頻帶為3.2~9.8 GHz共6.6 GHz，除頻比例為101.53%，此晶片的核心功率消耗為12.8 mW。
其次，我們研究複雜左手共振腔的架構，通過分析新設計雙共振腔左手注入鎖定除頻之工作原理來延伸討論此架構，使其技術可應用且能解釋其此架構之工作原理。此部分著重於應用雙左手雙共振腔注入鎖定除頻器與由多左手共振腔組成之注入鎖定除頻器可被視為由雙共振腔之注入鎖定除頻器為來源。
再者，我們提出新架構的四相位壓控震盪器，由四組交叉耦合(cross couple)壓控震盪器所組成，藉由環形電感的磁耦合來與四組壓控震盪器耦合。此電路設計使用行進波與駐波震盪器的概念，此四相位壓控震盪器使用台積電0.18微米製程且晶片面積為1.072×1.072 mm2。當工作電壓操作在1伏特，此晶片的核心功率消耗為5.33 mW。此四相位壓控震盪器的自由頻率是可調的，當調變電壓從0 至 2 伏特時，其頻率由3.26 至 3.98 GHz。在 1 MHz時量測之相位雜訊為 -122.143 dBc/Hz，且當震盪頻率為 3.26 GHz時，此四相位壓控震盪器之 FOM 值為 -185.11 dBc/Hz。
接著，提出修改的除二注入鎖定除頻器，當工作電壓操作在0.9伏特時，注入鎖定頻帶為3.3~11.2 GHz，比原先未修改之除二注入鎖定除頻器的鎖定頻帶2~8 GHz寬，原因是適當利用多共振腔之變壓器耦合線震盪器。且此改良之除二注入鎖定除頻器之頻率為可切換式，從高頻帶震盪頻率的3.8 GHz切至低頻帶震盪頻率的2.64 GHz ，以及從高頻帶震盪頻率切至中頻帶震盪頻率的3.08 GHz。
最後，提出使用台積電矽鍺0.18微米製程來呈現之寬操作範圍三頻帶除二注入鎖定除頻器且晶片面積為0.997×0.919 mm2。此除頻器電路採用電容交叉耦合LC震盪器和變壓器耦合之RLC共振腔之方式實現。工作電壓操作在0.9伏特時，此晶片的核心功率消耗為13.3 mW，此除頻器之三頻帶分別操作在4.46 GHz、3.58 GHz、2.58 GHz，且注入鎖定頻帶為3.3~8.2 GHz。

In this thesis, we propose a transformer-coupled transmission line (TL) quadrature voltage control oscillator and different kinds of injection-locked frequency dividers (ILFD): divide-by-2 quadrature ILFD using left-handed LC resonator, triple bands divide-by-2 ILFD, respectively. Another experiment is on a multiple left-handed LC resonator ILFD and improves the performance of the last work divide-by-2 TL-like resonator ILFD.
First, we present a wide locking range quadrature injection-locked frequency divider (QILFD) using left-handed LC resonator. The QILFD was implemented in the TSMC 0.18 μm 1P6M CMOS process. The QILFD uses a capacitive cross-coupled voltage-controlled oscillator (VCO) as the core and also uses one direct injection MOSFET. The die area is 1.101×1.169 mm2. At the drain-source dc bias of 1V and at the incident power of 0 dBm the locking range of the divide-by-2 QILFD is 6.6 GHz (101.53%) from 3.2 to 9.8 GHz, while the core power consumption is 12.8mW.
Secondly, we study the multiple LH resonator structure, expanding the conference work by analyzing the operation principle of the newly designed dual-resonance LH ILFDs in order to utilize this technique and to explain the operation of the conference work. This part focuses on the LH dual-resonance ILFD using two basic units as more complex multi-resonance LH resonator ILFD can be derived from the dual-resonance ILFD.
Thirdly, we present a new quadrature voltage-controlled oscillator (QVCO), which consists of four cross-coupled voltage-controlled oscillators (VCOs) coupled by a loop inductor through magnetic coupling. The circuit design uses the concept of traveling wave and standing wave oscillators. The proposed CMOS QVCO has been implemented with the TSMC 0.18 μm 1P6M technology and the die area is 1.072×1.072mm2. At the supply voltage of 1 V, the total power consumption is 5.33 mW. The free-running frequency of the QVCO is tuneable from 3.26 GHz to 3.98 GHz as the tuning voltage is varied from 0.0 V to 2 V. The measured phase noise at 1MHz frequency offset is -122.143 dBc/Hz at the oscillation frequency of 3.26 GHz and the figure of merit (FOM) of the proposed QVCO is -185.11 dBc/Hz.
Fourthly, a modified divide-by-2 LC ILFD is proposed. Its locking range at VDD=0.9 V is from 3.3 to 11.2 GHz, which is larger than the original divide-by-2 ILFD with a maximum locking range 6 GHz from 2 to 8 GHz. This is due to the proper utilization of multi-resonance transformer-coupled line resonator. Also the frequency of improved divide-by-2 LC ILFD is switchable, from the high-band oscillation frequency is 3.8 to the low-band oscillation frequency is 2.64 GHz. And from the high-band to the middle-band oscillation frequency is 3.08 GHz.
Finally, a triple-band wide operation range divide-by-2 injection-locked frequency divider (ILFD) using a standard the TSMC 0.18 μm 3P6M SiGe BiCMOS technology is presented which die area is 0.997×0.919mm2. The ÷2 ILFD circuit is realized with a capacitive cross-coupled LC-tank oscillator with a transformer-coupled RLC resonator. The core power consumption of the ILFD core is 13.3 mW at the supply voltage of 1V. The divider’s free-running frequency operates at three frequency bands: 4.46 GHz, 3.58 GHz and 2.58 GHz, and the ILFD locking range is from 3.3 to 8.2 GHz.

[1] B. Razavi, RF microelectronics, Prentice Hall PTR, 1998.
[2] B. Razavi, “RF Microelectronics”, Upper Saddle River, NJ: Prentice Hall, 1998
[3] N. M.Nguyen and R. G. Meyer, “Start-up and frequency stability in high-frequency oscillators,” IEEE J. Solid-State Circuit, vol. 27, no. 5, pp. 810–820, May 1992.
[4] J. Roggers, C. Plett, Radio frequency integrated circuit design, Artech House, 2003.
[5] B. Razavi, Design of Analog CMOS Integrated Circuits, Mc Graw Hill, 2001.
[6] B. Razavi, “Design of Integrated Circuits for Optical Communications”, Mc Graw Hill.
[7] S. J. Lee, B. Kim, K. Lee, “A Novel High-Speed Ring Oscillator for Multiphase Clock Generation Using Negative Skewed Delay Scheme”, IEEE Journal of Solid-State Circuits, vol. 32, No. 2, February 1997.
[8] De Muer, M. Borremans, M.Steyaert, and G. Li Puma, “A 2GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization,” IEEE J. Solid-State Circuits, vol. 35, pp. 1034-1038, 2000.
[9] S.Levantino, C. Samori, A. Bonfanti, S. L. J. Gierkink, A. L. Lacaita, and V. Boccuzzi, “Frequency Dependence on Bias Current in 5GHz CMOS VCOs:impact on tuning range and flicker noise upconversion”, IEEE J. Solid-State Circuits, vol. 37, pp.1001-1003, 2002
[10] T. H. Lee, “The Design of CMOS Radio Frequency Integrated Circuits”, Cambridge University Press, 1998
[11] J. Savoj, B. Razavi, High-Speed CMOS Circuits For Optical Receivers, Kluwer Academic Publishers, 2001.
[12] A. Rofougaran, J. Rael, M. Rofougaran, and A. Abidi, “A 900 MHz CMOS LC-oscillator with quadrature outputs,” in IEEE ISSCC Dig. Tech. Papers, pp. 392-393, Feb. 1996.
[13] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Transactions on Parts, Hybrids, and Packaging, vol. 10, pp. 101-109, Jun 1974.
[14] C. P. Yue, C. Ryu, JackLau, T. H. Lee, and S. Wong, “A physical model for planar spiral inductors on silicon,” 1996 International Electron Devices Meeting Technical Digest, pp. 155–158, Dec. 1996.
[15] J. R. Long, “Monolithic transformers for silicon RF IC design,” IEEE J. Solid-State Circuits, vol. 35, pp. 1368-1382, Sept. 2000.
[16] A Zolfaghari, A. Chan, and B. Razavi, “Stacked inductors and transformers in CMOS technology,” IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, Apr. 2001.
[17] T. Lee, and A. Hajimiri, “Oscillator phase noise: a tutorial,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326-336, Mar. 2000.
[18] P. Andreani, S. Mattisson, “On the use of MOS varactors in RF VCOs,” IEEE Journal of Solid-State Circuits, vol. 35, no. 6, pp. 905-910, June 2000.
[19] D. Hauspie, E.-C. Park, and J. Craninckx, “Wide-band VCO with simultaneous switching of frequency band, active core, and varactor size,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1472–1480, Jul. 2007.
[20] J. Craninckx and M. S. J. Steyaert, “A 1.75-GHz/3-V dual-modulus divide-by-128/ 129 prescaler in 0.7 um CMOS,” IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July 1996.
[21] S. H. Lee, S. L. Jang, “Implementation of New High Frequency CMOS VCOs and Injection-Locked Frequency Dividers,” April 2007.
[22] D. Leeson, “A simple model of feedback oscillator noise spectrum,” Proceedings of the IEEE, vol. 54, pp. 329–330, Feb. 1966.
[23] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 179–194, Feb. 1998.
[24] A. Hajimiri, and T. H. Lee, “Design issues in CMOS differential LC oscillators,” IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 717–724, May 1999.
[25] A. Hajimiri and T. H. Lee, The Design of Low Noise Oscillators, Springer 1999.
[26] Q. Huang and R. Rogenmoser, “Speed optimization of edge-triggered CMOS circuits for gigahertz single-phase clocks,” IEEE J. Solid-State Circuits, vol. 31, pp. 456-463, Mar. 1996.
[27] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 39, pp. 594-601, Apr. 2004.
[28] H. R. Rategh, and T.H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, pp. 813-821, June 1999.
[29] H. D. Wohlmuth and D. Kehrer, “A high sensitivity static 2:1 frequency divider up to 27 GHz in 120 nm CMOS,” IEEE European Solid State Circuits Conference (ESSCIRC), pp. 823-826, Sept. 2002.
[30] M. Tiebout, “A 480 uW 2 GHz ultra low power dual-modulus prescaler in 0.25 um standard CMOS,” IEEE International Symposium on Circuit and System (ISCAS), vol. 5, pp. 741-744, May 2000.
[31] H. Wu, and A. Hajimiri, “A 19 GHz 0.5 mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” IEEE ISSCC Dig. Tech. Papers, pp. 412-413, Feb. 2001.
[32] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1 GHz and 2.8 GHz CMOS injection- locked ring oscillator prescalers,” IEEE Symposium on VLSI Circuits, pp. 47-50, June 2001.
[33] P. Kinget, R. Melville, D. Long, and V. Gopinathan, “An Injection Locking Scheme for Precision Quadrature Generation,” IEEE J. Solid-State Circuits, vol. 37, pp. 845-851, July 2002.
[34] H. Wu, “Signal generation and processing in high-frequency/high-speed silicon- based integrated circuits,” PhD thesis, California Institute of Technology, 2003.
[35] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp.1380-1385, Oct. 1973.
[36] A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and design of injection locked LC dividers for quadrature generation,” IEEE J. Solid-State Circuits, vol. 39, pp. 1425–1432, Sep. 2004.
[37] S.-L. Jang, Y.-H. Chung, S.-H. Lee, L.-R. Chi, and J.-F. Lee,” An integrated 5/2.5GHz direct-injection locked quadrature LC VCO ,” IEEE Microw. Wireless Compon. Lett., pp.142-144,Feb. 2007.
[38] S.-L. Jang, C.-W. Chang and S.-M. Yang, ” Low power wide-locking range CMOS quadrature injection-locked frequency divider,” Microw. Opt. Technol. Lett., vol. 51, No.10, pp. 2420-2423, 2009.
[39] H. Wu and A. Hajimiri, A 19 GHz 0.5mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement, in IEEE Int.Solid-State Circuits Conf., pp. 412-413, Feb. 2001.
[40] Y.-H. Chuang, S.-H. Lee, R.-H. Yen, S.-L. Jang, J.-F. Lee and M.-H. Juang, A wide locking range and low voltage CMOS direct injection-locked frequency divider, IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 299-301, May 2006.
[41] S.-L. Jang, Z.-H. Wu, C.-W. Hsue and H.-F. Teng, ”Wide-locking range dual-band injection-locked frequency divider, ” Microw. Opt. Technol. Lett. vol.55, 10, pp. 2333–2337, October 2013.
[42] S.-L. Jang, Y.-J. Chen, C.-H. Fang and W. C. Lai, ” Enhanced locking range technique for frequency divider using dual-resonance RLC resonator,” Electronics Letters , vol. 51, no. 6, 19 March 2015, p. 456 – 458.
[43] S.-L. Jang, W.-C. Cheng and C.-W. Hsue, ” A triple-resonance RLC-tank divide-by-2injection-locked frequency divider,” Electronics Letters vol. 52, no. 8, p. 624 – 626, 2016.
[44] S.-L. Jang, H.-H. Lin and C.-W. Hsue,” Mode-switching left-handed standing wave voltage-controlled oscillator,”Microw. Opt. Technol. Lett. vol.55, 9, pp. 1977–2244, Sept. 2013.
[45] S.-L. Jang, W.-H. Lee, and C.-W. Hsue, ” Fully-integrated standing wave oscillator using composite right/left-handed LC network,” Opt. Technol. Lett., vol. 55, 5,pp.985-988, May. 2013.
[46] S.-L. Jang, C.-W. Chang, J.-Y. Wun, and M.-H. Juang,”Quadrature injection-locked frequency dividers using dual-resonance resonator,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 1, pp. 37-39, Jan. 2011.
[47] S.-L. Jang, C.-C. Liu, R.-K. Yang, C.-C. Shih, and C.-W. Chang, “A 0.35 um CMOS divide-by-2 quadrature injection-locked frequency divider based on voltage-current feedback topology”, Microelectronics Reliability, 50, pp.594–598, 2010.
[48] S.-L. Jang, Y.-H. Chuang, S.-H. Lee and Y.-H. Chiang,” A current reused CMOS quadrature injection locked frequency divider,” Microw. Opt. Technol. Lett., pp.1804-1806, Aug. 2007.
[49] L.-T. Chou, J.-F. Huang, and S.-L. Jang,” Wide-band divide-by-2 quadrature injection-locked frequency dividers with large output voltage swing,” Microw. Opt. Technol. Lett., vol. 54, pp.2284-2287, Oct., 2012.
[50] T. Shibasaki et al., “20-GHz quadrature injection-locked LC dividers with enhanced locking range," IEEE J. Solid-State Circuits, vol.43, no.3, pp.610-618, March 2008.
[51] S.-L. Jang, S.-C. Wu, C.-F. Lee and M.-H. Juang,” CMOS top-series coupling quadrature injection-locked frequency divider,” Microw. Opt. Technol. Lett., pp. 2554-2557, Oct. 2008.
[52] A. Yu, S. Tam, Y. Kim, E. Socher, W. Hant, M. Chang, and T. Itoh, “A dual-band millimeter-wave CMOS oscillator with left-handed resonator,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 5, pp. 1401–1409, May 2010.
[53] S.-L. Jang, H.-H. Lin and C.-W. Hsue,” Mode-switching left-handed standing wave voltage-controlled oscillator,”Microw. Opt. Technol. Lett. vol.55, 9,pp. 1977–2244, Sept. 2013.
[54] S.–L. Jang, W.-C. Lai, T.-C. Kung, "A low noise class-C voltage-controlled oscillator with left-handed resonator", 5th Int. Symposium on Next-Generation Electronics (ISNE), pp. 1-2, 2016.
[55] G. Li and E. Afshari, “A low-phase-noise multi-phase oscillator based on left-handed LC-ring,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1822–1833, Sep. 2010.
[56] S.–L. Jang, L.-Y. Huang and C.-W. Hsue,” Triple-band oscillator with two shunt fourth-order LC resonators,”Microw. Opt. Technol. Lett. vol. 58, issue 3, pp.580-583, March 2016.
[57] S.-L.Jang, Y.-J. Chen, C.-H. Fang and W. C. Lai, ” Enhanced locking range technique for frequency divider using dual-resonance RLC resonator,” Electron. Lett., vol. 51, no. 23, p. 1888 – 1889, Nov., 2015
[58] W.-C. Lai, S.–L. Jang and Y.-L. Ciou, ” Triple capacitive cross-coupled divide-by-2 injection-locked frequency divider,” IEEE Int. Wireless Symp. Guangzhou, China, May 19-22, 2019.
[59] S.-L. Jang, X.-Y. Hang, and W.–T. Liu, ”Review: capacitive cross-coupled injection-locked frequency dividers,” Analog Integr Circ Sig Process, 88:97–104, 2016.
[60] S.–L. Jang, W.-H. Lee, and C.-W. Hsue, ” Fully-integrated standing wave oscillator using composite right/left-handed LC network,” Microw. Opt. Technol. Lett, vol. 55, 5, pp.985-988, May. 2013.
[61] W. Andress and D. Ham, “Standing wave oscillators utilizing wave adaptive tapered transmission lines,” IEEE J. Solid-State Circuits, vol. 40, no. 3, pp. 638–651, Mar. 2005.
[62] J.-C. Chien, L.-H. Lu, “Design of wide-tuning-range millimeter-wave CMOS VCO With a standing-wave architecture,” IEEE J. Solid State Circuits, no. 9, vol. 42, pp. 1942-1952, Sept. 2007.
[63] L. Wu, A. Ng, L. Leung, and H.C. Luong, “A 24-GHz and 60-GHz dual-band standing-wave VCO in 0.13µm CMOS process,” IEEE Radio Frequency Integrated Circuit Symposium. May. 2010, pp.145-148.
[64] T.-Y. Lu and W.-Z. Chen, “A 38/114 GHz switched-mode and synchronous lock standing wave oscillator,” IEEE Microwave Wireless Component Letter, vol. 21, no. 1, pp. 40-42, Dec. 2010.
[65] Y. Chen and K. D. Pedrotti, “Rotary traveling-wave oscillators, analysis and simulation,” IEEE Trans. Circuits Syst. I, vol. 58, no. 1, pp. 77–87, Jan. 2011.
[66] S.-L. Jang, S.-S. Lin, C.-W. Chang and S.-H. Hsu, “A complementary cross-coupled quadrature VCO using ring inductor coupling method,” Microw. Opt. Technol. Lett., pp.839-842, April, 2012.
[67] S.-L. Jang, H.-F. Teng, C.-W. Chang, and C.-W. Hsieh “Quadrature VCO using the composite right-/left-handed dual-resonance resonator,” 2012 Asia-Pacific Microwave Conference (APMC2012). 4D-05.
[68] S.-L. Jang, H.-H. Lin, J.-F. Huang and C.-W. Hsue,” Dual-band rotary standing wave voltage-controlled oscillator,” INT J RF MICROW C E., vol. 24, no. 5, pp. 536-543, May 2014.
[69] S.-L. Jang, ” Complementary current reuse quadrature VCOs,” IET Microw. Antennas Propag., Vol. 10, Iss. 7, pp. 756–763, 2016.
[70] J.-C. Chien, and L.-H. Lu, “Design of wide-tuning-range millimeter-wave CMOS VCO with a standing-wave architecture,” IEEE J. Solid State Circuits, no. 9, vol. 42, pp. 1942-1952, Sept. 2007.
[71] Muh-Dey Wei; Sheng-Fuh Chang; Ye Zhang; Yung-Jhih Yang; Renato Neagra, “2.4 GHz / 3.5 GHz dual-band wide-tuning-range quadrature VCO using harmonic-injection coupling technique,” Silicon Monolithic Integrated Circuits in Rf Systems (SiRF), pp. 107-109, Jan 2014.
[72] Pei-Kang Tsai; Tzuen-his Huang; Yu-ting Chen “Dual-band quadrature voltage-controlled oscillator using differential inner-diamond-structure switchable inductor” IET Circuits, Devices & Systems, vol. 7, pp. 368-375, Aug. 2013.
[73] Xinrong Hu; Fengyi Huang; Tao Li; Xusheng Tang “A dual-band series coupled quadrature LC-VCO for IMT-A and UWB systems” Ultra-Wideband (ICUWB), vol. 2, pp. 1-4, Sept. 2010.
[74] Sheng-Lyang Jang, Chih-Chieh Shih, Cheng-Chen Liu and Miin-Horng Juang, “A 0.18 m CMOS Quadrature VCO Using the Quadruple Push-Push Technique,” IEEE Microw. Wireless Compon. Lett.,vol. 20, No. 6, pp. 343-345, Jun. 2010.
[75] C. Y. Jeong and C. Yoo, “5-GHz low-phase noise CMOS quadrature VCO,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 11, pp. 609–611, Nov. 2006.
[76] Y.-H. Chuang, S.-H. Lee, R.-H. Yen, S.-L. Jang, J.-F. Lee, and M.-H. Juang, “A wide locking range and low voltage CMOS direct injectionlocked frequency divider,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 299–301, May 2006.
[77] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813–821, Jun. 1999.
[78] S.-L. Jang, and C.-Y. Lin, ” A wide-locking range Class-C injection-locked frequency divider,”Electronics Letters .,vol. 50, 23, pp.1710-1712, 2014.
[79] S.-L. Jang, Y.-K. Wu, C.-C. Liu and J.-F. Huang, ” A dual-band CMOS voltage-controlled oscillator implemented with dual-resonance LC tank,” IEEE Microw. Wireless Compon. Lett., vol. 19, No. 12, pp.816-818, Dec. 2009.
[80] A. Bevilacqua et al., “Transformer-based dual-mode voltage-controlled oscillators,” IEEE Trans. Circuits Syst. II, Expr. Briefs, vol. 54, no. 4, pp. 293–297, Apr. 2007.
[81] B. Catli, M. M. Hella, "A 1.94 to 2.55 GHz, 3.6 to 4.77 GHz tunable CMOS VCO based on double-tuned, double-driven coupled resonators," IEEE J. Solid State Circuits, vol.44, no.9, pp.2463-2477, Sept. 2009.
[82] Sheng–LyangJang, Wei-Chung Chengand Ching-Wen Hsue, ” A Triple-Resonance RLC-tank Divide-by-2 Injection-Locked Frequency Divider,”Electronics Letters14th April 2016 Vol. 52 No. 8 pp. 624–626, 2016.
[83] S.-L. Jang, C.-C. Shih, C.-W. Chang, C.-C. Liu, and J.-F. Huang, ” A dual-band divide-by-2 Injection locked frequency divider in 0.35 μm SiGe BiCMOS,” Micro. Opti. Tech. Lett., pp.2762-2765, Dec., 2010.
[84] S.-L. Jang, L.-T. Chou, J.-F. Huang, and C.-W. Chang, ” A dual-band dual-resonance quadrature injection-locked frequency divider,” IEICE Trans. on Electron., Vol.E94-C,No.8,pp.1336-1339, Aug. 2011.
[85] S.-L. Jang, C.-W. Chang, J.-Y. Wun, and M.-H. Juang, ” Quadrature injection-locked frequency dividers using dual-resonance resonator,” IEEE Microw. Wireless Compon. Lett., vol. 21, no. 1, pp. 37-39, Jan. 2011.
[86] M. Tiebout, “A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider,” IEEE J. Solid-State Circuits,vol. 39, no. 7, pp. 1170–1174, Jul. 2004.
[87] H. Wu and A. Hajimiri, “A 19 GHz 0.5mW 0.35 μm CMOS frequencydivider with shunt-peaking locking-range enhancement,” in IEEE Int.Solid-State Circuits Conf., pp. 412-413, Feb. 2001.
[88] J. Lee and B. Razavi, “A 40 GHz frequency divider in 0.18-μm CMOS technology,” in Symp., VLSI Circuits Dig. Tech. Papers, pp. 259–262, Jun. 2003.
[89] S. Lee, S. Jang, and C. Nguyen, “Low-power-consumption wide-locking-range dual-injection-locked 1/2 divider through simultaneous optimization of VCO loaded Q and current,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 10, pp. 3161–3168, Oct. 2012.
[90] N. Mahalingam, K. Ma, K. S. Yeo, and W. M. Lim, “Coupled dual LC tanks based ILFD with low injection power and compact size,” IEEE Microw. Wireless Compon. Lett., vol. 24, no. 2, pp. 105-107, Feb. 2014.
[91] S.-L. Jang, F.-B. Lin,and J.-F. Huang,” Wide-band divide-by-2 injection-locked frequency divider using MOSFET mixers DC-biased in subthreshold region,” Int. J. Circ Theor App, 12, Jan. 2015.