由於近年來使用了許多的資訊設備與電力電子轉換器，使得電力品質的問題日趨嚴重，其中因為諧波污染、負載不平衡等負載特性均會影響用戶功率因數量測值，本文以六種功率因數定義式，針對同一筆用戶負載量測資料計算其功率因數值，計算所得之六個值將因負載特性不同而有所差異。
隨著半導體的技術愈來愈成熟，SOC(System On a Chip)設計已是未來的趨勢，使所設計的系統晶片能達到功能強、體積小的目的，本文利用快速傅立葉轉換(FFT)為基礎來分析六種功率因數定義式，利用硬體描述語言(VHDL)及使用一些新式矽智財(IP core)如CORDIC core 和 FFT core在以由下而上的設計流程(Bottom-Up)建構整個模擬系統。最後在利用模擬與實測波形，來求取所需之實、虛與視在功率值，其平均誤差大約為0.2%左右。

The power quality is more and more serious, because a lot of information technology equipments and power electric convertors were used in recent years. Harmonic and load unbalance can affect the measurement result of power factor of utility. This paper used six formula for power factor measurement, and they will be different according to the characteristics of load. The technology of semiconductor was more and more maturative. Design of SOC (System On a Chip) is a trend to achieve the strong and small volume in the future. This paper used Fast Fourier Transform(FFT) to analyze the six formula of power factor. The simulation system was modeled in Hardware Description Language (VHDL) and some novel IP (intellectual property) cores, such as CORDIC core and FFT core by the way of Bottom-Up. The measurement data were employed to calculate active, reactive and apparent power. The average error rate of our design is about 0.2%.

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